PMCNTENSET_EL0    871 arch/arm64/kvm/sys_regs.c 			__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) |= val;
PMCNTENSET_EL0    876 arch/arm64/kvm/sys_regs.c 			__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &= ~val;
PMCNTENSET_EL0    880 arch/arm64/kvm/sys_regs.c 		p->regval = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & mask;
PMCNTENSET_EL0   1554 arch/arm64/kvm/sys_regs.c 	{ SYS_DESC(SYS_PMCNTENSET_EL0), access_pmcnten, reset_unknown, PMCNTENSET_EL0 },
PMCNTENSET_EL0   1555 arch/arm64/kvm/sys_regs.c 	{ SYS_DESC(SYS_PMCNTENCLR_EL0), access_pmcnten, NULL, PMCNTENSET_EL0 },
PMCNTENSET_EL0    360 virt/kvm/arm/pmu.c 		reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);
PMCNTENSET_EL0    490 virt/kvm/arm/pmu.c 	val &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);
PMCNTENSET_EL0    539 virt/kvm/arm/pmu.c 		       __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & mask);
PMCNTENSET_EL0    556 virt/kvm/arm/pmu.c 	       (__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & BIT(select_idx));