PLL_OUTCTRL       333 drivers/clk/qcom/clk-alpha-pll.c 	mask = PLL_OUTCTRL | PLL_RESET_N | PLL_BYPASSNL;
PLL_OUTCTRL       372 drivers/clk/qcom/clk-alpha-pll.c 				 PLL_OUTCTRL, PLL_OUTCTRL);
PLL_OUTCTRL       395 drivers/clk/qcom/clk-alpha-pll.c 	mask = PLL_OUTCTRL;
PLL_OUTCTRL       768 drivers/clk/qcom/clk-alpha-pll.c 	return ((opmode_regval & TRION_PLL_RUN) && (mode_regval & PLL_OUTCTRL));
PLL_OUTCTRL       812 drivers/clk/qcom/clk-alpha-pll.c 				 PLL_OUTCTRL, PLL_OUTCTRL);
PLL_OUTCTRL       833 drivers/clk/qcom/clk-alpha-pll.c 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
PLL_OUTCTRL      1064 drivers/clk/qcom/clk-alpha-pll.c 	if ((opmode_val & FABIA_OPMODE_RUN) && (val & PLL_OUTCTRL))
PLL_OUTCTRL      1067 drivers/clk/qcom/clk-alpha-pll.c 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
PLL_OUTCTRL      1093 drivers/clk/qcom/clk-alpha-pll.c 	return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,
PLL_OUTCTRL      1094 drivers/clk/qcom/clk-alpha-pll.c 				 PLL_OUTCTRL);
PLL_OUTCTRL      1114 drivers/clk/qcom/clk-alpha-pll.c 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
PLL_OUTCTRL        84 drivers/clk/qcom/clk-hfpll.c 	regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL);
PLL_OUTCTRL        98 drivers/clk/qcom/clk-hfpll.c 	if (!(mode & (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL)))
PLL_OUTCTRL       115 drivers/clk/qcom/clk-hfpll.c 			   PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL, 0);
PLL_OUTCTRL       207 drivers/clk/qcom/clk-hfpll.c 	if (mode != (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL)) {
PLL_OUTCTRL       232 drivers/clk/qcom/clk-hfpll.c 	return mode == (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL);
PLL_OUTCTRL        30 drivers/clk/qcom/clk-pll.c 	mask = PLL_OUTCTRL | PLL_RESET_N | PLL_BYPASSNL;
PLL_OUTCTRL        61 drivers/clk/qcom/clk-pll.c 	return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL,
PLL_OUTCTRL        62 drivers/clk/qcom/clk-pll.c 				 PLL_OUTCTRL);
PLL_OUTCTRL        75 drivers/clk/qcom/clk-pll.c 	mask = PLL_OUTCTRL | PLL_RESET_N | PLL_BYPASSNL;
PLL_OUTCTRL       147 drivers/clk/qcom/clk-pll.c 	u32 enable_mask = PLL_OUTCTRL | PLL_BYPASSNL | PLL_RESET_N;
PLL_OUTCTRL       296 drivers/clk/qcom/clk-pll.c 	return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL,
PLL_OUTCTRL       297 drivers/clk/qcom/clk-pll.c 				 PLL_OUTCTRL);
PLL_OUTCTRL       307 drivers/clk/qcom/clk-pll.c 	u32 enable_mask = PLL_OUTCTRL | PLL_BYPASSNL | PLL_RESET_N;