PLL_DIVR1_MASK    344 drivers/clk/imx/clk-sccg-pll.c 	divr1 = FIELD_GET(PLL_DIVR1_MASK, val);
PLL_DIVR1_MASK    382 drivers/clk/imx/clk-sccg-pll.c 	val &= ~(PLL_DIVR1_MASK | PLL_DIVR2_MASK | PLL_DIVQ_MASK);
PLL_DIVR1_MASK    385 drivers/clk/imx/clk-sccg-pll.c 	val |= FIELD_PREP(PLL_DIVR1_MASK, setup->divr1);