PLL_DIV1          121 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          123 drivers/clk/clk-qoriq.c 		[4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          129 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          130 drivers/clk/clk-qoriq.c 		[4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          137 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          139 drivers/clk/clk-qoriq.c 		[4] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          145 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          146 drivers/clk/clk-qoriq.c 		[4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          153 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          155 drivers/clk/clk-qoriq.c 		[4] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          162 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          164 drivers/clk/clk-qoriq.c 		[4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          171 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          173 drivers/clk/clk-qoriq.c 		[4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          175 drivers/clk/clk-qoriq.c 		[8] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL3, PLL_DIV1 },
PLL_DIV1          181 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID | CLKSEL_80PCT, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          182 drivers/clk/clk-qoriq.c 		[8] = { CLKSEL_VALID, CGA_PLL3, PLL_DIV1 },
PLL_DIV1          184 drivers/clk/clk-qoriq.c 		[12] = { CLKSEL_VALID, CGA_PLL4, PLL_DIV1 },
PLL_DIV1          191 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          198 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          200 drivers/clk/clk-qoriq.c 		[4] = { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          208 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          212 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          216 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL3, PLL_DIV1 },
PLL_DIV1          224 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          228 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          236 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGB_PLL1, PLL_DIV1 },
PLL_DIV1          240 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGB_PLL2, PLL_DIV1 },
PLL_DIV1          248 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          249 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          261 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          262 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          274 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          275 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          287 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          288 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          314 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          327 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          336 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          347 drivers/clk/clk-qoriq.c 		[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          356 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          371 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          375 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          384 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL2, PLL_DIV1 },
PLL_DIV1          388 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          397 drivers/clk/clk-qoriq.c 		{ CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
PLL_DIV1          412 drivers/clk/clk-qoriq.c 		[5] = { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          422 drivers/clk/clk-qoriq.c 		[5] = { CLKSEL_VALID, PLATFORM_PLL, PLL_DIV1 },
PLL_DIV1          503 drivers/clk/clk-qoriq.c 	cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk;
PLL_DIV1          943 drivers/clk/clk-qoriq.c 	plat_rate = clk_get_rate(cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk);