PLL_BYPASSNL 333 drivers/clk/qcom/clk-alpha-pll.c mask = PLL_OUTCTRL | PLL_RESET_N | PLL_BYPASSNL; PLL_BYPASSNL 351 drivers/clk/qcom/clk-alpha-pll.c PLL_BYPASSNL, PLL_BYPASSNL); PLL_BYPASSNL 402 drivers/clk/qcom/clk-alpha-pll.c mask = PLL_RESET_N | PLL_BYPASSNL; PLL_BYPASSNL 63 drivers/clk/qcom/clk-hfpll.c regmap_update_bits(regmap, hd->mode_reg, PLL_BYPASSNL, PLL_BYPASSNL); PLL_BYPASSNL 98 drivers/clk/qcom/clk-hfpll.c if (!(mode & (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL))) PLL_BYPASSNL 115 drivers/clk/qcom/clk-hfpll.c PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL, 0); PLL_BYPASSNL 207 drivers/clk/qcom/clk-hfpll.c if (mode != (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL)) { PLL_BYPASSNL 232 drivers/clk/qcom/clk-hfpll.c return mode == (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL); PLL_BYPASSNL 30 drivers/clk/qcom/clk-pll.c mask = PLL_OUTCTRL | PLL_RESET_N | PLL_BYPASSNL; PLL_BYPASSNL 40 drivers/clk/qcom/clk-pll.c ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, PLL_BYPASSNL 41 drivers/clk/qcom/clk-pll.c PLL_BYPASSNL); PLL_BYPASSNL 75 drivers/clk/qcom/clk-pll.c mask = PLL_OUTCTRL | PLL_RESET_N | PLL_BYPASSNL; PLL_BYPASSNL 147 drivers/clk/qcom/clk-pll.c u32 enable_mask = PLL_OUTCTRL | PLL_BYPASSNL | PLL_RESET_N; PLL_BYPASSNL 274 drivers/clk/qcom/clk-pll.c ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, PLL_BYPASSNL 275 drivers/clk/qcom/clk-pll.c PLL_BYPASSNL); PLL_BYPASSNL 307 drivers/clk/qcom/clk-pll.c u32 enable_mask = PLL_OUTCTRL | PLL_BYPASSNL | PLL_RESET_N;