PLLU_BASE         472 drivers/clk/tegra/clk-tegra114.c 	.base_reg = PLLU_BASE,
PLLU_BASE         970 drivers/clk/tegra/clk-tegra114.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
PLLU_BASE         717 drivers/clk/tegra/clk-tegra124.c 	.base_reg = PLLU_BASE,
PLLU_BASE        1108 drivers/clk/tegra/clk-tegra124.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
PLLU_BASE         372 drivers/clk/tegra/clk-tegra20.c 	.base_reg = PLLU_BASE,
PLLU_BASE        2225 drivers/clk/tegra/clk-tegra210.c 	.base_reg = PLLU_BASE,
PLLU_BASE        2846 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + PLLU_BASE);
PLLU_BASE        2851 drivers/clk/tegra/clk-tegra210.c 	writel(reg, clk_base + PLLU_BASE);
PLLU_BASE        2854 drivers/clk/tegra/clk-tegra210.c 	writel(reg, clk_base + PLLU_BASE);
PLLU_BASE        2856 drivers/clk/tegra/clk-tegra210.c 	readl_relaxed_poll_timeout_atomic(clk_base + PLLU_BASE, reg,
PLLU_BASE        2873 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + PLLU_BASE);
PLLU_BASE        2883 drivers/clk/tegra/clk-tegra210.c 		reg = readl_relaxed(clk_base + PLLU_BASE);
PLLU_BASE        2885 drivers/clk/tegra/clk-tegra210.c 		writel(reg, clk_base + PLLU_BASE);
PLLU_BASE        2905 drivers/clk/tegra/clk-tegra210.c 		reg = readl_relaxed(clk_base + PLLU_BASE);
PLLU_BASE        2907 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(reg, clk_base + PLLU_BASE);
PLLU_BASE        3123 drivers/clk/tegra/clk-tegra210.c 					 clk_base + PLLU_BASE, 16, 4, 0,
PLLU_BASE        3152 drivers/clk/tegra/clk-tegra210.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
PLLU_BASE        3159 drivers/clk/tegra/clk-tegra210.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
PLLU_BASE        3166 drivers/clk/tegra/clk-tegra210.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
PLLU_BASE         477 drivers/clk/tegra/clk-tegra30.c 	.base_reg = PLLU_BASE,