PKUNITY_NAND_BASE    8 arch/unicore32/include/mach/regs-nand.h #define NAND_IDR0	(PKUNITY_NAND_BASE + 0x0000)
PKUNITY_NAND_BASE   12 arch/unicore32/include/mach/regs-nand.h #define NAND_IDR1	(PKUNITY_NAND_BASE + 0x0004)
PKUNITY_NAND_BASE   16 arch/unicore32/include/mach/regs-nand.h #define NAND_IDR2	(PKUNITY_NAND_BASE + 0x0008)
PKUNITY_NAND_BASE   20 arch/unicore32/include/mach/regs-nand.h #define NAND_IDR3	(PKUNITY_NAND_BASE + 0x000C)
PKUNITY_NAND_BASE   24 arch/unicore32/include/mach/regs-nand.h #define NAND_PAR0	(PKUNITY_NAND_BASE + 0x0010)
PKUNITY_NAND_BASE   28 arch/unicore32/include/mach/regs-nand.h #define NAND_PAR1	(PKUNITY_NAND_BASE + 0x0014)
PKUNITY_NAND_BASE   32 arch/unicore32/include/mach/regs-nand.h #define NAND_PAR2	(PKUNITY_NAND_BASE + 0x0018)
PKUNITY_NAND_BASE   36 arch/unicore32/include/mach/regs-nand.h #define NAND_ECCEN	(PKUNITY_NAND_BASE + 0x001C)
PKUNITY_NAND_BASE   40 arch/unicore32/include/mach/regs-nand.h #define NAND_BUF	(PKUNITY_NAND_BASE + 0x0020)
PKUNITY_NAND_BASE   44 arch/unicore32/include/mach/regs-nand.h #define NAND_ECCSR	(PKUNITY_NAND_BASE + 0x0024)
PKUNITY_NAND_BASE   48 arch/unicore32/include/mach/regs-nand.h #define NAND_CMD	(PKUNITY_NAND_BASE + 0x0028)
PKUNITY_NAND_BASE   52 arch/unicore32/include/mach/regs-nand.h #define NAND_DMACR	(PKUNITY_NAND_BASE + 0x002C)
PKUNITY_NAND_BASE   56 arch/unicore32/include/mach/regs-nand.h #define NAND_IR		(PKUNITY_NAND_BASE + 0x0030)
PKUNITY_NAND_BASE   60 arch/unicore32/include/mach/regs-nand.h #define NAND_IMR	(PKUNITY_NAND_BASE + 0x0034)
PKUNITY_NAND_BASE   64 arch/unicore32/include/mach/regs-nand.h #define NAND_CHIPEN	(PKUNITY_NAND_BASE + 0x0038)
PKUNITY_NAND_BASE   68 arch/unicore32/include/mach/regs-nand.h #define NAND_ADDR	(PKUNITY_NAND_BASE + 0x003C)