PIXCLK             34 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRI(RESYNC_CNTL, PIXCLK, id), \
PIXCLK             38 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRI(RESYNC_CNTL, PIXCLK, id), \
PIXCLK            133 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 	CLK_MAP(PIXCLK, PPCLK_PIXCLK),
PIXCLK            157 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	CLK_MAP(PIXCLK, PPCLK_PIXCLK),
PIXCLK            314 drivers/video/fbdev/kyro/fbdev.c 			     par->HSP, par->VSP, &par->PIXCLK) < 0)
PIXCLK            499 drivers/video/fbdev/kyro/fbdev.c 	par->PIXCLK = ((1000000000 + (info->var.pixclock / 2))
PIXCLK            121 drivers/video/fbdev/mbx/mbxdebugfs.c 	s += sprintf(s, "PIXCLK = %08x\n", readl(PIXCLK));
PIXCLK            323 drivers/video/fbdev/mbx/mbxfb.c 		write_reg_dly((readl(PIXCLK) & ~PIXCLK_EN), PIXCLK);
PIXCLK            328 drivers/video/fbdev/mbx/mbxfb.c 		write_reg_dly((readl(PIXCLK) | PIXCLK_EN), PIXCLK);
PIXCLK            742 drivers/video/fbdev/mbx/mbxfb.c 	write_reg_dly(PIXCLK_EN, PIXCLK);
PIXCLK             32 include/video/kyro.h 	u32 PIXCLK;	/* Pixel Clock       */