PIPE_C 745 drivers/gpu/drm/i915/display/icl_dsi.c case PIPE_C: PIPE_C 1326 drivers/gpu/drm/i915/display/icl_dsi.c *pipe = PIPE_C; PIPE_C 1587 drivers/gpu/drm/i915/display/icl_dsi.c encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); PIPE_C 1818 drivers/gpu/drm/i915/display/intel_ddi.c case PIPE_C: PIPE_C 2007 drivers/gpu/drm/i915/display/intel_ddi.c *pipe_mask = BIT(PIPE_C); PIPE_C 5140 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLE); PIPE_C 5166 drivers/gpu/drm/i915/display/intel_display.c case PIPE_C: PIPE_C 7218 drivers/gpu/drm/i915/display/intel_display.c other_crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_C); PIPE_C 7230 drivers/gpu/drm/i915/display/intel_display.c case PIPE_C: PIPE_C 8177 drivers/gpu/drm/i915/display/intel_display.c (pipe == PIPE_B || pipe == PIPE_C)) PIPE_C 10265 drivers/gpu/drm/i915/display/intel_display.c trans_pipe = PIPE_C; PIPE_C 10917 drivers/gpu/drm/i915/display/intel_display.c if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_C && PIPE_C 102 drivers/gpu/drm/i915/display/intel_display.h TRANSCODER_C = PIPE_C, PIPE_C 1407 drivers/gpu/drm/i915/display/intel_display_power.c pipe = PIPE_C; PIPE_C 1468 drivers/gpu/drm/i915/display/intel_display_power.c assert_pll_disabled(dev_priv, PIPE_C); PIPE_C 1488 drivers/gpu/drm/i915/display/intel_display_power.c enum pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C; PIPE_C 2750 drivers/gpu/drm/i915/display/intel_display_power.c .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), PIPE_C 2951 drivers/gpu/drm/i915/display/intel_display_power.c .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), PIPE_C 3033 drivers/gpu/drm/i915/display/intel_display_power.c .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), PIPE_C 3093 drivers/gpu/drm/i915/display/intel_display_power.c .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), PIPE_C 3262 drivers/gpu/drm/i915/display/intel_display_power.c .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), PIPE_C 3583 drivers/gpu/drm/i915/display/intel_display_power.c .hsw.irq_pipe_mask = BIT(PIPE_C), PIPE_C 3900 drivers/gpu/drm/i915/display/intel_display_power.c .hsw.irq_pipe_mask = BIT(PIPE_C), PIPE_C 1330 drivers/gpu/drm/i915/display/intel_display_types.h case PIPE_C: PIPE_C 185 drivers/gpu/drm/i915/display/intel_pipe_crc.c case PIPE_C: PIPE_C 249 drivers/gpu/drm/i915/display/intel_pipe_crc.c case PIPE_C: PIPE_C 2361 drivers/gpu/drm/i915/display/intel_sprite.c if (IS_GEN(dev_priv, 9) && !IS_GEMINILAKE(dev_priv) && pipe == PIPE_C) PIPE_C 2422 drivers/gpu/drm/i915/display/intel_sprite.c return pipe != PIPE_C; PIPE_C 2424 drivers/gpu/drm/i915/display/intel_sprite.c return pipe != PIPE_C && PIPE_C 1011 drivers/gpu/drm/i915/display/vlv_dsi.c if (WARN_ON(tmp > PIPE_C)) PIPE_C 1873 drivers/gpu/drm/i915/display/vlv_dsi.c intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); PIPE_C 1220 drivers/gpu/drm/i915/gvt/cmd_parser.c [4] = {PIPE_C, PLANE_A, PRIMARY_C_FLIP_DONE}, PIPE_C 1221 drivers/gpu/drm/i915/gvt/cmd_parser.c [5] = {PIPE_C, PLANE_B, SPRITE_C_FLIP_DONE}, PIPE_C 1279 drivers/gpu/drm/i915/gvt/cmd_parser.c info->pipe = PIPE_C; PIPE_C 1294 drivers/gpu/drm/i915/gvt/cmd_parser.c info->pipe = PIPE_C; PIPE_C 52 drivers/gpu/drm/i915/gvt/display.c pipe = PIPE_C; PIPE_C 436 drivers/gpu/drm/i915/gvt/display.c [PIPE_C] = PIPE_C_VBLANK, PIPE_C 440 drivers/gpu/drm/i915/gvt/display.c if (pipe < PIPE_A || pipe > PIPE_C) PIPE_C 635 drivers/gpu/drm/i915/gvt/handlers.c calc_index(offset, _FDI_RXA_CTL, _FDI_RXB_CTL, 0, FDI_RX_CTL(PIPE_C)) PIPE_C 638 drivers/gpu/drm/i915/gvt/handlers.c calc_index(offset, _FDI_TXA_CTL, _FDI_TXB_CTL, 0, FDI_TX_CTL(PIPE_C)) PIPE_C 641 drivers/gpu/drm/i915/gvt/handlers.c calc_index(offset, _FDI_RXA_IMR, _FDI_RXB_IMR, 0, FDI_RX_IMR(PIPE_C)) PIPE_C 749 drivers/gpu/drm/i915/gvt/handlers.c calc_index(offset, _DSPASURF, _DSPBSURF, 0, DSPSURF(PIPE_C)) PIPE_C 772 drivers/gpu/drm/i915/gvt/handlers.c calc_index(offset, _SPRA_SURF, _SPRB_SURF, 0, SPRSURF(PIPE_C)) PIPE_C 1961 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPEDSL(PIPE_C), D_ALL); PIPE_C 1966 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PIPECONF(PIPE_C), D_ALL, NULL, pipeconf_mmio_write); PIPE_C 1971 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPESTAT(PIPE_C), D_ALL); PIPE_C 1976 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_C), D_ALL); PIPE_C 1981 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_C), D_ALL); PIPE_C 1986 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(CURCNTR(PIPE_C), D_ALL); PIPE_C 1990 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(CURPOS(PIPE_C), D_ALL); PIPE_C 1994 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(CURBASE(PIPE_C), D_ALL); PIPE_C 1998 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(CUR_FBC_CTL(PIPE_C), D_ALL); PIPE_C 2031 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPCNTR(PIPE_C), D_ALL); PIPE_C 2032 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPADDR(PIPE_C), D_ALL); PIPE_C 2033 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPSTRIDE(PIPE_C), D_ALL); PIPE_C 2034 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPPOS(PIPE_C), D_ALL); PIPE_C 2035 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPSIZE(PIPE_C), D_ALL); PIPE_C 2036 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(DSPSURF(PIPE_C), D_ALL, NULL, pri_surf_mmio_write); PIPE_C 2037 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPOFFSET(PIPE_C), D_ALL); PIPE_C 2038 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPSURFLIVE(PIPE_C), D_ALL); PIPE_C 2039 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(REG_50080(PIPE_C, PLANE_PRIMARY), D_ALL, NULL, PIPE_C 2072 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRCTL(PIPE_C), D_ALL); PIPE_C 2073 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRLINOFF(PIPE_C), D_ALL); PIPE_C 2074 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRSTRIDE(PIPE_C), D_ALL); PIPE_C 2075 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRPOS(PIPE_C), D_ALL); PIPE_C 2076 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRSIZE(PIPE_C), D_ALL); PIPE_C 2077 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRKEYVAL(PIPE_C), D_ALL); PIPE_C 2078 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRKEYMSK(PIPE_C), D_ALL); PIPE_C 2079 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(SPRSURF(PIPE_C), D_ALL, NULL, spr_surf_mmio_write); PIPE_C 2080 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRKEYMAX(PIPE_C), D_ALL); PIPE_C 2081 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPROFFSET(PIPE_C), D_ALL); PIPE_C 2082 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRSCALE(PIPE_C), D_ALL); PIPE_C 2083 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(SPRSURFLIVE(PIPE_C), D_ALL); PIPE_C 2084 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(REG_50080(PIPE_C, PLANE_SPRITE0), D_ALL, NULL, PIPE_C 2174 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PF_CTL(PIPE_C), D_ALL); PIPE_C 2175 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PF_WIN_SZ(PIPE_C), D_ALL); PIPE_C 2176 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PF_WIN_POS(PIPE_C), D_ALL); PIPE_C 2177 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PF_VSCALE(PIPE_C), D_ALL); PIPE_C 2178 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PF_HSCALE(PIPE_C), D_ALL); PIPE_C 2216 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(FDI_RX_IIR(PIPE_C), D_ALL, NULL, fdi_rx_iir_mmio_write); PIPE_C 2219 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(FDI_RX_IMR(PIPE_C), D_ALL, NULL, update_fdi_rx_iir_status); PIPE_C 2222 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(FDI_RX_CTL(PIPE_C), D_ALL, NULL, update_fdi_rx_iir_status); PIPE_C 2251 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(TRANS_DP_CTL(PIPE_C), D_ALL); PIPE_C 2261 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(TVIDEO_DIP_CTL(PIPE_C), D_ALL); PIPE_C 2262 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(TVIDEO_DIP_DATA(PIPE_C), D_ALL); PIPE_C 2263 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(TVIDEO_DIP_GCP(PIPE_C), D_ALL); PIPE_C 2362 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_COEFF_RY_GY(PIPE_C), D_ALL); PIPE_C 2363 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_COEFF_BY(PIPE_C), D_ALL); PIPE_C 2364 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_COEFF_RU_GU(PIPE_C), D_ALL); PIPE_C 2365 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_COEFF_BU(PIPE_C), D_ALL); PIPE_C 2366 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_COEFF_RV_GV(PIPE_C), D_ALL); PIPE_C 2367 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_COEFF_BV(PIPE_C), D_ALL); PIPE_C 2368 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_MODE(PIPE_C), D_ALL); PIPE_C 2369 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_PREOFF_HI(PIPE_C), D_ALL); PIPE_C 2370 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_PREOFF_ME(PIPE_C), D_ALL); PIPE_C 2371 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_PREOFF_LO(PIPE_C), D_ALL); PIPE_C 2372 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_POSTOFF_HI(PIPE_C), D_ALL); PIPE_C 2373 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_POSTOFF_ME(PIPE_C), D_ALL); PIPE_C 2374 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_CSC_POSTOFF_LO(PIPE_C), D_ALL); PIPE_C 2384 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PREC_PAL_INDEX(PIPE_C), D_ALL); PIPE_C 2385 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PREC_PAL_DATA(PIPE_C), D_ALL); PIPE_C 2386 drivers/gpu/drm/i915/gvt/handlers.c MMIO_F(PREC_PAL_GC_MAX(PIPE_C, 0), 4 * 3, 0, 0, 0, D_ALL, NULL, NULL); PIPE_C 2402 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_WM_LINETIME(PIPE_C), D_ALL); PIPE_C 2428 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GAMMA_MODE(PIPE_C), D_ALL); PIPE_C 2432 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPE_MULT(PIPE_C), D_ALL); PIPE_C 2715 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_C), D_BDW_PLUS, NULL, PIPE_C 2717 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IER(PIPE_C), D_BDW_PLUS, NULL, PIPE_C 2719 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_C), D_BDW_PLUS, NULL, PIPE_C 2721 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_DE_PIPE_ISR(PIPE_C), D_BDW_PLUS); PIPE_C 2773 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPEMISC(PIPE_C), D_BDW_PLUS); PIPE_C 2796 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(CHICKEN_PIPESL_1(PIPE_C), D_BDW_PLUS); PIPE_C 2912 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(SKL_PS_WIN_POS(PIPE_C, 0), D_SKL_PLUS, NULL, pf_write); PIPE_C 2913 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(SKL_PS_WIN_POS(PIPE_C, 1), D_SKL_PLUS, NULL, pf_write); PIPE_C 2919 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(SKL_PS_WIN_SZ(PIPE_C, 0), D_SKL_PLUS, NULL, pf_write); PIPE_C 2920 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(SKL_PS_WIN_SZ(PIPE_C, 1), D_SKL_PLUS, NULL, pf_write); PIPE_C 2926 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(SKL_PS_CTRL(PIPE_C, 0), D_SKL_PLUS, NULL, pf_write); PIPE_C 2927 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(SKL_PS_CTRL(PIPE_C, 1), D_SKL_PLUS, NULL, pf_write); PIPE_C 2939 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_BUF_CFG(PIPE_C, 0), D_SKL_PLUS, NULL, NULL); PIPE_C 2940 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_BUF_CFG(PIPE_C, 1), D_SKL_PLUS, NULL, NULL); PIPE_C 2941 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_BUF_CFG(PIPE_C, 2), D_SKL_PLUS, NULL, NULL); PIPE_C 2942 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_BUF_CFG(PIPE_C, 3), D_SKL_PLUS, NULL, NULL); PIPE_C 2946 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(CUR_BUF_CFG(PIPE_C), D_SKL_PLUS, NULL, NULL); PIPE_C 2956 drivers/gpu/drm/i915/gvt/handlers.c MMIO_F(PLANE_WM(PIPE_C, 0, 0), 4 * 8, 0, 0, 0, D_SKL_PLUS, NULL, NULL); PIPE_C 2957 drivers/gpu/drm/i915/gvt/handlers.c MMIO_F(PLANE_WM(PIPE_C, 1, 0), 4 * 8, 0, 0, 0, D_SKL_PLUS, NULL, NULL); PIPE_C 2958 drivers/gpu/drm/i915/gvt/handlers.c MMIO_F(PLANE_WM(PIPE_C, 2, 0), 4 * 8, 0, 0, 0, D_SKL_PLUS, NULL, NULL); PIPE_C 2962 drivers/gpu/drm/i915/gvt/handlers.c MMIO_F(CUR_WM(PIPE_C, 0), 4 * 8, 0, 0, 0, D_SKL_PLUS, NULL, NULL); PIPE_C 2972 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_WM_TRANS(PIPE_C, 0), D_SKL_PLUS, NULL, NULL); PIPE_C 2973 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_WM_TRANS(PIPE_C, 1), D_SKL_PLUS, NULL, NULL); PIPE_C 2974 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_WM_TRANS(PIPE_C, 2), D_SKL_PLUS, NULL, NULL); PIPE_C 2978 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(CUR_WM_TRANS(PIPE_C), D_SKL_PLUS, NULL, NULL); PIPE_C 2990 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 0), D_SKL_PLUS, NULL, NULL); PIPE_C 2991 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 1), D_SKL_PLUS, NULL, NULL); PIPE_C 2992 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 2), D_SKL_PLUS, NULL, NULL); PIPE_C 2993 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 3), D_SKL_PLUS, NULL, NULL); PIPE_C 3005 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 1)), D_SKL_PLUS, NULL, NULL); PIPE_C 3006 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 2)), D_SKL_PLUS, NULL, NULL); PIPE_C 3007 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 3)), D_SKL_PLUS, NULL, NULL); PIPE_C 3008 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 4)), D_SKL_PLUS, NULL, NULL); PIPE_C 3020 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 1)), D_SKL_PLUS, NULL, NULL); PIPE_C 3021 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 2)), D_SKL_PLUS, NULL, NULL); PIPE_C 3022 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 3)), D_SKL_PLUS, NULL, NULL); PIPE_C 3023 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 4)), D_SKL_PLUS, NULL, NULL); PIPE_C 3088 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_C)), D_SKL_PLUS); PIPE_C 3091 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_C)), D_SKL_PLUS); PIPE_C 3094 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_C)), D_SKL_PLUS); PIPE_C 3334 drivers/gpu/drm/i915/gvt/handlers.c {D_ALL, LGC_PALETTE(PIPE_C, 0), 1024, NULL, NULL}, PIPE_C 451 drivers/gpu/drm/i915/gvt/interrupt.c DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(de_pipe_c, GEN8_DE_PIPE_ISR(PIPE_C)); PIPE_C 76 drivers/gpu/drm/i915/gvt/reg.h (((p) == PIPE_C) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x5008C)) : \ PIPE_C 84 drivers/gpu/drm/i915/gvt/reg.h (((reg) == 0x5008C || (reg) == 0x5009C) ? (PIPE_C) : \ PIPE_C 1750 drivers/gpu/drm/i915/i915_irq.c case PIPE_C: PIPE_C 111 drivers/gpu/drm/i915/i915_pci.c [PIPE_C] = CHV_CURSOR_C_OFFSET, \ PIPE_C 118 drivers/gpu/drm/i915/i915_pci.c [PIPE_C] = IVB_CURSOR_C_OFFSET, \ PIPE_C 46 drivers/gpu/drm/i915/i915_trace.h __entry->frame[PIPE_C], __entry->scanline[PIPE_C]) PIPE_C 73 drivers/gpu/drm/i915/i915_trace.h __entry->frame[PIPE_C], __entry->scanline[PIPE_C]) PIPE_C 170 drivers/gpu/drm/i915/i915_trace.h __entry->frame[PIPE_C], __entry->scanline[PIPE_C]) PIPE_C 871 drivers/gpu/drm/i915/intel_device_info.c runtime->num_scalers[PIPE_C] = 1; PIPE_C 894 drivers/gpu/drm/i915/intel_device_info.c runtime->num_sprites[PIPE_C] = 1; PIPE_C 940 drivers/gpu/drm/i915/intel_device_info.c enabled_mask &= ~BIT(PIPE_C); PIPE_C 515 drivers/gpu/drm/i915/intel_pm.c case PIPE_C: PIPE_C 1024 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) | PIPE_C 1025 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE)); PIPE_C 1027 drivers/gpu/drm/i915/intel_pm.c FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) | PIPE_C 1028 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC)); PIPE_C 1031 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) | PIPE_C 1032 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) | PIPE_C 1033 drivers/gpu/drm/i915/intel_pm.c FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) | PIPE_C 1916 drivers/gpu/drm/i915/intel_pm.c wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1; PIPE_C 2026 drivers/gpu/drm/i915/intel_pm.c case PIPE_C: PIPE_C 3566 drivers/gpu/drm/i915/intel_pm.c if (dirty & WM_DIRTY_PIPE(PIPE_C)) PIPE_C 3573 drivers/gpu/drm/i915/intel_pm.c if (dirty & WM_DIRTY_LINETIME(PIPE_C)) PIPE_C 3574 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(PIPE_WM_LINETIME(PIPE_C), results->wm_linetime[2]); PIPE_C 5839 drivers/gpu/drm/i915/intel_pm.c [PIPE_C] = WM0_PIPEC_IVB, PIPE_C 5949 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEF); PIPE_C 5950 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEE); PIPE_C 5953 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEC); PIPE_C 5954 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC); PIPE_C 5958 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEF_HI) << 8; PIPE_C 5959 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEE_HI) << 8; PIPE_C 5960 drivers/gpu/drm/i915/intel_pm.c wm->pipe[PIPE_C].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEC_HI) << 8;