PIPECONF_ENABLE 897 drivers/gpu/drm/i915/display/icl_dsi.c tmp |= PIPECONF_ENABLE; PIPECONF_ENABLE 1077 drivers/gpu/drm/i915/display/icl_dsi.c tmp &= ~PIPECONF_ENABLE; PIPECONF_ENABLE 1334 drivers/gpu/drm/i915/display/icl_dsi.c ret = tmp & PIPECONF_ENABLE; PIPECONF_ENABLE 1259 drivers/gpu/drm/i915/display/intel_display.c cur_state = !!(val & PIPECONF_ENABLE); PIPECONF_ENABLE 1831 drivers/gpu/drm/i915/display/intel_display.c if (val & PIPECONF_ENABLE) { PIPECONF_ENABLE 1837 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(reg, val | PIPECONF_ENABLE); PIPECONF_ENABLE 1872 drivers/gpu/drm/i915/display/intel_display.c if ((val & PIPECONF_ENABLE) == 0) PIPECONF_ENABLE 1884 drivers/gpu/drm/i915/display/intel_display.c val &= ~PIPECONF_ENABLE; PIPECONF_ENABLE 1887 drivers/gpu/drm/i915/display/intel_display.c if ((val & PIPECONF_ENABLE) == 0) PIPECONF_ENABLE 8289 drivers/gpu/drm/i915/display/intel_display.c pipeconf |= I915_READ(PIPECONF(crtc->pipe)) & PIPECONF_ENABLE; PIPECONF_ENABLE 8787 drivers/gpu/drm/i915/display/intel_display.c if (!(tmp & PIPECONF_ENABLE)) PIPECONF_ENABLE 9963 drivers/gpu/drm/i915/display/intel_display.c if (!(tmp & PIPECONF_ENABLE)) PIPECONF_ENABLE 10293 drivers/gpu/drm/i915/display/intel_display.c return tmp & PIPECONF_ENABLE; PIPECONF_ENABLE 16349 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PIPECONF(pipe), PIPECONF_ENABLE | PIPECONF_PROGRESSIVE); PIPECONF_ENABLE 1027 drivers/gpu/drm/i915/display/intel_display_power.c if ((I915_READ(PIPECONF(PIPE_A)) & PIPECONF_ENABLE) == 0) PIPECONF_ENABLE 1029 drivers/gpu/drm/i915/display/intel_display_power.c if ((I915_READ(PIPECONF(PIPE_B)) & PIPECONF_ENABLE) == 0) PIPECONF_ENABLE 1043 drivers/gpu/drm/i915/display/intel_display_power.c return I915_READ(PIPECONF(PIPE_A)) & PIPECONF_ENABLE && PIPECONF_ENABLE 1044 drivers/gpu/drm/i915/display/intel_display_power.c I915_READ(PIPECONF(PIPE_B)) & PIPECONF_ENABLE; PIPECONF_ENABLE 992 drivers/gpu/drm/i915/display/vlv_dsi.c enabled = I915_READ(PIPECONF(PIPE_B)) & PIPECONF_ENABLE; PIPECONF_ENABLE 62 drivers/gpu/drm/i915/gvt/display.c if (!(vgpu_vreg_t(vgpu, PIPECONF(_PIPE_EDP)) & PIPECONF_ENABLE)) PIPECONF_ENABLE 77 drivers/gpu/drm/i915/gvt/display.c if (vgpu_vreg_t(vgpu, PIPECONF(pipe)) & PIPECONF_ENABLE) PIPECONF_ENABLE 344 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE; PIPECONF_ENABLE 448 drivers/gpu/drm/i915/gvt/handlers.c if (data & PIPECONF_ENABLE) PIPECONF_ENABLE 1354 drivers/video/fbdev/intelfb/intelfbhw.c tmp &= ~PIPECONF_ENABLE; PIPECONF_ENABLE 1366 drivers/video/fbdev/intelfb/intelfbhw.c tmp &= ~PIPECONF_ENABLE; PIPECONF_ENABLE 1441 drivers/video/fbdev/intelfb/intelfbhw.c OUTREG(pipe_conf_reg, *pipe_conf | PIPECONF_ENABLE);