PIPEACONF_ENABLE 724 drivers/gpu/drm/gma500/cdv_intel_display.c pipeconf |= PIPEACONF_ENABLE; PIPEACONF_ENABLE 244 drivers/gpu/drm/gma500/gma_display.c if ((temp & PIPEACONF_ENABLE) == 0) PIPEACONF_ENABLE 245 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->conf, temp | PIPEACONF_ENABLE); PIPEACONF_ENABLE 290 drivers/gpu/drm/gma500/gma_display.c if ((temp & PIPEACONF_ENABLE) != 0) { PIPEACONF_ENABLE 291 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE); PIPEACONF_ENABLE 256 drivers/gpu/drm/gma500/mdfld_intel_display.c if ((temp & PIPEACONF_ENABLE) != 0) { PIPEACONF_ENABLE 257 drivers/gpu/drm/gma500/mdfld_intel_display.c temp &= ~PIPEACONF_ENABLE; PIPEACONF_ENABLE 270 drivers/gpu/drm/gma500/mdfld_intel_display.c & PIPEACONF_ENABLE)) || pipe == 1) { PIPEACONF_ENABLE 365 drivers/gpu/drm/gma500/mdfld_intel_display.c if ((temp & PIPEACONF_ENABLE) == 0) { PIPEACONF_ENABLE 390 drivers/gpu/drm/gma500/mdfld_intel_display.c temp &= ~PIPEACONF_ENABLE; PIPEACONF_ENABLE 406 drivers/gpu/drm/gma500/mdfld_intel_display.c temp |= PIPEACONF_ENABLE; PIPEACONF_ENABLE 442 drivers/gpu/drm/gma500/mdfld_intel_display.c if ((temp & PIPEACONF_ENABLE) != 0) { PIPEACONF_ENABLE 443 drivers/gpu/drm/gma500/mdfld_intel_display.c temp &= ~PIPEACONF_ENABLE; PIPEACONF_ENABLE 455 drivers/gpu/drm/gma500/mdfld_intel_display.c | REG_READ(PIPECCONF)) & PIPEACONF_ENABLE)) PIPEACONF_ENABLE 845 drivers/gpu/drm/gma500/mdfld_intel_display.c dev_priv->pipeconf[pipe] = PIPEACONF_ENABLE; /* FIXME_JLIU7 REG_READ(pipeconf_reg); */ PIPEACONF_ENABLE 262 drivers/gpu/drm/gma500/oaktrail_crtc.c if ((temp & PIPEACONF_ENABLE) == 0) { PIPEACONF_ENABLE 264 drivers/gpu/drm/gma500/oaktrail_crtc.c temp | PIPEACONF_ENABLE, i); PIPEACONF_ENABLE 306 drivers/gpu/drm/gma500/oaktrail_crtc.c if ((temp & PIPEACONF_ENABLE) != 0) { PIPEACONF_ENABLE 308 drivers/gpu/drm/gma500/oaktrail_crtc.c temp & ~PIPEACONF_ENABLE, i); PIPEACONF_ENABLE 364 drivers/gpu/drm/gma500/oaktrail_hdmi.c pipeconf |= PIPEACONF_ENABLE; PIPEACONF_ENABLE 404 drivers/gpu/drm/gma500/oaktrail_hdmi.c if ((temp & PIPEACONF_ENABLE) != 0) { PIPEACONF_ENABLE 405 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PIPEBCONF, temp & ~PIPEACONF_ENABLE); PIPEACONF_ENABLE 411 drivers/gpu/drm/gma500/oaktrail_hdmi.c if ((temp & PIPEACONF_ENABLE) != 0) { PIPEACONF_ENABLE 412 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_PIPEBCONF, temp & ~PIPEACONF_ENABLE); PIPEACONF_ENABLE 446 drivers/gpu/drm/gma500/oaktrail_hdmi.c if ((temp & PIPEACONF_ENABLE) == 0) { PIPEACONF_ENABLE 447 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PIPEBCONF, temp | PIPEACONF_ENABLE); PIPEACONF_ENABLE 453 drivers/gpu/drm/gma500/oaktrail_hdmi.c if ((temp & PIPEACONF_ENABLE) == 0) { PIPEACONF_ENABLE 454 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_PIPEBCONF, temp | PIPEACONF_ENABLE); PIPEACONF_ENABLE 202 drivers/gpu/drm/gma500/psb_intel_display.c pipeconf |= PIPEACONF_ENABLE; PIPEACONF_ENABLE 517 drivers/gpu/drm/gma500/psb_irq.c if (!(reg_val & PIPEACONF_ENABLE)) PIPEACONF_ENABLE 576 drivers/gpu/drm/gma500/psb_irq.c if (!(reg_val & PIPEACONF_ENABLE)) PIPEACONF_ENABLE 643 drivers/gpu/drm/gma500/psb_irq.c if (!(reg_val & PIPEACONF_ENABLE)) {