PIC_MASTER_CMD     22 arch/mips/include/asm/i8259.h #define PIC_MASTER_ISR		PIC_MASTER_CMD
PIC_MASTER_CMD     63 arch/mips/include/asm/i8259.h 	outb(0x0C, PIC_MASTER_CMD);		/* prepare for poll */
PIC_MASTER_CMD     64 arch/mips/include/asm/i8259.h 	irq = inb(PIC_MASTER_CMD) & 7;
PIC_MASTER_CMD     38 arch/mips/loongson64/lemote-2f/irq.c 		isr = inb(PIC_MASTER_CMD) &
PIC_MASTER_CMD     17 arch/x86/include/asm/i8259.h #define PIC_MASTER_ISR		PIC_MASTER_CMD
PIC_MASTER_CMD    104 arch/x86/kernel/i8259.c 		ret = inb(PIC_MASTER_CMD) & mask;
PIC_MASTER_CMD    133 arch/x86/kernel/i8259.c 		outb(0x0B, PIC_MASTER_CMD);	/* ISR register */
PIC_MASTER_CMD    134 arch/x86/kernel/i8259.c 		value = inb(PIC_MASTER_CMD) & irqmask;
PIC_MASTER_CMD    135 arch/x86/kernel/i8259.c 		outb(0x0A, PIC_MASTER_CMD);	/* back to the IRR register */
PIC_MASTER_CMD    183 arch/x86/kernel/i8259.c 		outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD);
PIC_MASTER_CMD    187 arch/x86/kernel/i8259.c 		outb(0x60+irq, PIC_MASTER_CMD);	/* 'Specific EOI to master */
PIC_MASTER_CMD    340 arch/x86/kernel/i8259.c 	outb_pic(0x11, PIC_MASTER_CMD);	/* ICW1: select 8259A-1 init */
PIC_MASTER_CMD    117 drivers/irqchip/irq-i8259.c 		outb(0x0B, PIC_MASTER_CMD);	/* ISR register */
PIC_MASTER_CMD    118 drivers/irqchip/irq-i8259.c 		value = inb(PIC_MASTER_CMD) & irqmask;
PIC_MASTER_CMD    119 drivers/irqchip/irq-i8259.c 		outb(0x0A, PIC_MASTER_CMD);	/* back to the IRR register */
PIC_MASTER_CMD    165 drivers/irqchip/irq-i8259.c 		outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
PIC_MASTER_CMD    169 drivers/irqchip/irq-i8259.c 		outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
PIC_MASTER_CMD    242 drivers/irqchip/irq-i8259.c 	outb_p(0x11, PIC_MASTER_CMD);	/* ICW1: select 8259A-1 init */
PIC_MASTER_CMD    282 drivers/irqchip/irq-i8259.c 	.start = PIC_MASTER_CMD,