PIC32_SET 60 arch/mips/pic32/pic32mzda/early_console.c uart_base + PIC32_SET(U_STA(port))); PIC32_SET 108 drivers/clk/microchip/clk-core.c writel(PB_DIV_ENABLE, PIC32_SET(pb->ctrl_reg)); PIC32_SET 258 drivers/clk/microchip/clk-core.c writel(REFO_ON | REFO_OE, PIC32_SET(refo->ctrl_reg)); PIC32_SET 522 drivers/clk/microchip/clk-core.c writel(REFO_ON | REFO_DIVSW_EN, PIC32_SET(refo->ctrl_reg)); PIC32_SET 855 drivers/clk/microchip/clk-core.c writel(OSC_SWEN, PIC32_SET(sclk->mux_reg)); PIC32_SET 966 drivers/clk/microchip/clk-core.c writel(sosc->enable_mask, PIC32_SET(sosc->enable_reg)); PIC32_SET 65 drivers/irqchip/irq-pic32-evic.c writel(BIT(bit), evic_base + PIC32_SET(REG_INTCON)); PIC32_SET 116 drivers/irqchip/irq-pic32-evic.c evic_base + PIC32_SET(REG_IPC_OFFSET + reg * 0x10)); PIC32_SET 1819 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(TRIS_REG)); PIC32_SET 1838 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(PORT_REG)); PIC32_SET 1940 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base +PIC32_SET(CNPU_REG)); PIC32_SET 1944 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(CNPD_REG)); PIC32_SET 1952 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(ANSEL_REG)); PIC32_SET 1956 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(ODCU_REG)); PIC32_SET 2014 drivers/pinctrl/pinctrl-pic32.c writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_SET(CNCON_REG)); PIC32_SET 2035 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(CNEN_REG)); PIC32_SET 2039 drivers/pinctrl/pinctrl-pic32.c writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG)); PIC32_SET 2045 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(CNNE_REG)); PIC32_SET 2047 drivers/pinctrl/pinctrl-pic32.c writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG)); PIC32_SET 2051 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(CNEN_REG)); PIC32_SET 2053 drivers/pinctrl/pinctrl-pic32.c writel(mask, bank->reg_base + PIC32_SET(CNNE_REG)); PIC32_SET 2055 drivers/pinctrl/pinctrl-pic32.c writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG)); PIC32_SET 106 drivers/rtc/rtc-pic32.c base + (enabled ? PIC32_SET(PIC32_RTCALRM) : PIC32_SET 124 drivers/rtc/rtc-pic32.c writel(freq << 8, base + PIC32_SET(PIC32_RTCALRM)); PIC32_SET 125 drivers/rtc/rtc-pic32.c writel(PIC32_RTCALRM_CHIME, base + PIC32_SET(PIC32_RTCALRM)); PIC32_SET 278 drivers/rtc/rtc-pic32.c writel(PIC32_RTCCON_RTCWREN, base + PIC32_SET(PIC32_RTCCON)); PIC32_SET 282 drivers/rtc/rtc-pic32.c writel(PIC32_RTCCON_ON, base + PIC32_SET(PIC32_RTCCON)); PIC32_SET 78 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), PIC32_SET 158 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), PIC32_SET 184 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), PIC32_SET 368 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), PIC32_SET 370 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), PIC32_SET 543 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), PIC32_SET 552 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), PIC32_SET 557 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), PIC32_SET 570 drivers/tty/serial/pic32_uart.c pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), PIC32_SET 50 drivers/watchdog/pic32-dmt.c writel(DMT_ON, PIC32_SET(dmt->regs + DMTCON_REG)); PIC32_SET 111 drivers/watchdog/pic32-wdt.c writel(WDTCON_ON, PIC32_SET(wdt->regs + WDTCON_REG));