PHY_SetBBReg      191 drivers/staging/rtl8188eu/include/hal8188e_phy_cfg.h #define PHY_SetMacReg	PHY_SetBBReg
PHY_SetBBReg       87 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
PHY_SetBBReg       90 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
PHY_SetBBReg       93 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32);
PHY_SetBBReg       98 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
PHY_SetBBReg      101 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
PHY_SetBBReg      104 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, value32);
PHY_SetBBReg      113 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
PHY_SetBBReg      114 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
PHY_SetBBReg      115 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00);
PHY_SetBBReg      119 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
PHY_SetBBReg      120 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
PHY_SetBBReg      121 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, 0x00);
PHY_SetBBReg      446 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      459 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
PHY_SetBBReg      460 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
PHY_SetBBReg      463 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
PHY_SetBBReg      464 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      465 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      466 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      468 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x821303ea);
PHY_SetBBReg      469 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
PHY_SetBBReg      470 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
PHY_SetBBReg      471 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
PHY_SetBBReg      475 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
PHY_SetBBReg      478 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
PHY_SetBBReg      483 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
PHY_SetBBReg      486 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
PHY_SetBBReg      489 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
PHY_SetBBReg      493 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
PHY_SetBBReg      494 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
PHY_SetBBReg      502 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
PHY_SetBBReg      504 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
PHY_SetBBReg      507 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      557 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      569 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
PHY_SetBBReg      572 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
PHY_SetBBReg      573 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
PHY_SetBBReg      576 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
PHY_SetBBReg      577 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      578 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      579 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      582 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0);
PHY_SetBBReg      583 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
PHY_SetBBReg      584 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
PHY_SetBBReg      585 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
PHY_SetBBReg      589 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911);
PHY_SetBBReg      592 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
PHY_SetBBReg      597 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
PHY_SetBBReg      600 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
PHY_SetBBReg      603 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
PHY_SetBBReg      607 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
PHY_SetBBReg      608 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
PHY_SetBBReg      616 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
PHY_SetBBReg      618 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
PHY_SetBBReg      621 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      651 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, u4tmp);
PHY_SetBBReg      660 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      674 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
PHY_SetBBReg      677 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      678 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
PHY_SetBBReg      679 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      680 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      682 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
PHY_SetBBReg      684 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x2813001f);
PHY_SetBBReg      685 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
PHY_SetBBReg      686 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
PHY_SetBBReg      690 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1);
PHY_SetBBReg      693 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
PHY_SetBBReg      698 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000000);
PHY_SetBBReg      701 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
PHY_SetBBReg      704 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
PHY_SetBBReg      708 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
PHY_SetBBReg      709 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
PHY_SetBBReg      717 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
PHY_SetBBReg      719 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
PHY_SetBBReg      722 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      735 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      771 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      786 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
PHY_SetBBReg      787 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
PHY_SetBBReg      790 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
PHY_SetBBReg      791 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      792 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      793 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      796 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x821303ea);
PHY_SetBBReg      797 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
PHY_SetBBReg      798 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
PHY_SetBBReg      799 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
PHY_SetBBReg      803 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
PHY_SetBBReg      806 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
PHY_SetBBReg      809 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
PHY_SetBBReg      813 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
PHY_SetBBReg      817 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
PHY_SetBBReg      818 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
PHY_SetBBReg      826 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
PHY_SetBBReg      828 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
PHY_SetBBReg      831 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      877 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      880 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
PHY_SetBBReg      896 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
PHY_SetBBReg      897 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
PHY_SetBBReg      901 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
PHY_SetBBReg      902 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      903 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      904 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg      907 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0);
PHY_SetBBReg      908 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
PHY_SetBBReg      909 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
PHY_SetBBReg      910 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
PHY_SetBBReg      914 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911);
PHY_SetBBReg      917 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
PHY_SetBBReg      920 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
PHY_SetBBReg      924 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
PHY_SetBBReg      928 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
PHY_SetBBReg      929 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
PHY_SetBBReg      938 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
PHY_SetBBReg      940 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
PHY_SetBBReg      943 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      975 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, u4tmp);
PHY_SetBBReg      983 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg      999 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
PHY_SetBBReg     1002 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
PHY_SetBBReg     1003 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
PHY_SetBBReg     1004 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg     1005 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
PHY_SetBBReg     1007 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
PHY_SetBBReg     1009 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_A, bMaskDWord, 0x2813001f);
PHY_SetBBReg     1010 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
PHY_SetBBReg     1011 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
PHY_SetBBReg     1015 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1);
PHY_SetBBReg     1018 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
PHY_SetBBReg     1021 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
PHY_SetBBReg     1025 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
PHY_SetBBReg     1029 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
PHY_SetBBReg     1030 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
PHY_SetBBReg     1038 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB);
PHY_SetBBReg     1040 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00001800);
PHY_SetBBReg     1043 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg     1110 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
PHY_SetBBReg     1112 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(31), ((X*Oldval_0>>7) & 0x1));
PHY_SetBBReg     1121 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
PHY_SetBBReg     1125 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
PHY_SetBBReg     1129 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(29), ((Y*Oldval_0>>7) & 0x1));
PHY_SetBBReg     1148 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, 0x3FF, reg);
PHY_SetBBReg     1150 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, 0xFC00, reg);
PHY_SetBBReg     1155 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg);
PHY_SetBBReg     1191 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
PHY_SetBBReg     1193 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(27), ((X*Oldval_1>>7) & 0x1));
PHY_SetBBReg     1203 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
PHY_SetBBReg     1209 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
PHY_SetBBReg     1213 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(25), ((Y*Oldval_1>>7) & 0x1));
PHY_SetBBReg     1230 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
PHY_SetBBReg     1232 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
PHY_SetBBReg     1261 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC94][VAL]);
PHY_SetBBReg     1262 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC80][VAL]);
PHY_SetBBReg     1263 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL]);
PHY_SetBBReg     1265 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL]);
PHY_SetBBReg     1266 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xCA0][VAL]);
PHY_SetBBReg     1269 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL]);
PHY_SetBBReg     1270 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC80][VAL]);
PHY_SetBBReg     1271 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][KEY], bMaskDWord, pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL]);
PHY_SetBBReg     1273 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xC14][VAL]);
PHY_SetBBReg     1274 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY], bMaskDWord, pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL]);
PHY_SetBBReg     1335 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
PHY_SetBBReg     1368 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[0], bMaskDWord, 0x01c00014);
PHY_SetBBReg     1370 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[0], bMaskDWord, pathOn);
PHY_SetBBReg     1374 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[i], bMaskDWord, pathOn);
PHY_SetBBReg     1571 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rCCK0_AFESetting, 0x0f000000, 0xf);
PHY_SetBBReg     1572 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
PHY_SetBBReg     1573 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
PHY_SetBBReg     1574 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
PHY_SetBBReg     1585 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg     1599 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg     1636 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 				PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
PHY_SetBBReg     1669 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0);
PHY_SetBBReg     1686 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, 0xc50, bMaskByte0, 0x50);
PHY_SetBBReg     1687 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, 0xc50, bMaskByte0, tmp0xc50);
PHY_SetBBReg     1689 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0xc58, bMaskByte0, 0x50);
PHY_SetBBReg     1690 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0xc58, bMaskByte0, tmp0xc58);
PHY_SetBBReg     1694 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
PHY_SetBBReg     1695 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
PHY_SetBBReg     1854 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, offset, bMaskDWord, data);
PHY_SetBBReg     1871 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, offset, bMaskDWord, data);
PHY_SetBBReg     2013 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, GNT_BT_default);
PHY_SetBBReg      822 drivers/staging/rtl8723bs/hal/hal_btcoex.c 	PHY_SetBBReg(padapter, RegAddr, BitMask, Data);
PHY_SetBBReg     2355 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c 						PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue);
PHY_SetBBReg       22 drivers/staging/rtl8723bs/hal/odm_CfoTracking.c 	PHY_SetBBReg(
PHY_SetBBReg       63 drivers/staging/rtl8723bs/hal/odm_CfoTracking.c 	PHY_SetBBReg(
PHY_SetBBReg       23 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff);		/* 0xe28[7:0]= 0xff		th_8 */
PHY_SetBBReg       24 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7);	/* 0x890[9:8]=3			enable CCX */
PHY_SetBBReg       25 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1);		/* 0xc0c[7]= 1			max power among all RX ants */
PHY_SetBBReg       53 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0);
PHY_SetBBReg       54 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1);
PHY_SetBBReg      152 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
PHY_SetBBReg      153 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
PHY_SetBBReg      176 drivers/staging/rtl8723bs/hal/odm_DIG.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
PHY_SetBBReg      177 drivers/staging/rtl8723bs/hal/odm_DIG.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
PHY_SetBBReg      230 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, REG_RD_CTRL, BIT11, 1); /*  stop counting if EDCCA is asserted */
PHY_SetBBReg      261 drivers/staging/rtl8723bs/hal/odm_DIG.c 		PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208);
PHY_SetBBReg      266 drivers/staging/rtl8723bs/hal/odm_DIG.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, 0x7f);
PHY_SetBBReg      267 drivers/staging/rtl8723bs/hal/odm_DIG.c 		PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, 0x7f);
PHY_SetBBReg      319 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc);
PHY_SetBBReg      320 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc);
PHY_SetBBReg      347 drivers/staging/rtl8723bs/hal/odm_DIG.c 		PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
PHY_SetBBReg      350 drivers/staging/rtl8723bs/hal/odm_DIG.c 			PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
PHY_SetBBReg      904 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1);
PHY_SetBBReg      906 drivers/staging/rtl8723bs/hal/odm_DIG.c 	PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1);
PHY_SetBBReg      941 drivers/staging/rtl8723bs/hal/odm_DIG.c 		PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1);
PHY_SetBBReg      942 drivers/staging/rtl8723bs/hal/odm_DIG.c 		PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1);
PHY_SetBBReg       65 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */
PHY_SetBBReg       66 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, 0); /* RegC70[3]= 1'b0 */
PHY_SetBBReg       67 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */
PHY_SetBBReg       68 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */
PHY_SetBBReg       69 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */
PHY_SetBBReg       70 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0); /* Reg818[28]= 1'b0 */
PHY_SetBBReg       71 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x1); /* Reg818[28]= 1'b1 */
PHY_SetBBReg       73 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874);
PHY_SetBBReg       74 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, pDM_PSTable->RegC70);
PHY_SetBBReg       75 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
PHY_SetBBReg       76 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
PHY_SetBBReg       77 drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c 			PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0);
PHY_SetBBReg       64 drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c 		PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 1);
PHY_SetBBReg       75 drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c 		PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 0);
PHY_SetBBReg      156 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c 	PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
PHY_SetBBReg      220 drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c 		PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
PHY_SetBBReg      149 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
PHY_SetBBReg      153 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
PHY_SetBBReg      157 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
PHY_SetBBReg      158 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge);
PHY_SetBBReg      257 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
PHY_SetBBReg      551 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6)));
PHY_SetBBReg      596 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex);
PHY_SetBBReg      599 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex);
PHY_SetBBReg      602 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex);
PHY_SetBBReg      605 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex);
PHY_SetBBReg      609 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex);
PHY_SetBBReg      612 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex);
PHY_SetBBReg      615 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte2, PowerIndex);
PHY_SetBBReg      618 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte3, PowerIndex);
PHY_SetBBReg      622 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex);
PHY_SetBBReg      625 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex);
PHY_SetBBReg      628 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte2, PowerIndex);
PHY_SetBBReg      631 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte3, PowerIndex);
PHY_SetBBReg      635 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex);
PHY_SetBBReg      638 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex);
PHY_SetBBReg      641 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte2, PowerIndex);
PHY_SetBBReg      644 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte3, PowerIndex);
PHY_SetBBReg      648 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex);
PHY_SetBBReg      651 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex);
PHY_SetBBReg      654 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte2, PowerIndex);
PHY_SetBBReg      657 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte3, PowerIndex);
PHY_SetBBReg      847 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
PHY_SetBBReg      849 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
PHY_SetBBReg      853 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0);
PHY_SetBBReg      858 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
PHY_SetBBReg      860 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
PHY_SetBBReg      863 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1));
PHY_SetBBReg      865 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
PHY_SetBBReg      869 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
PHY_SetBBReg      122 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c 		PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
PHY_SetBBReg      126 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c 		PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
PHY_SetBBReg      130 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c 		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);	/*  Set 1 to 4 bits for 8255 */
PHY_SetBBReg      133 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c 		PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);	/*  Set 0 to 12  bits for 8255 */
PHY_SetBBReg      162 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c 			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
PHY_SetBBReg      166 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c 			PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
PHY_SetBBReg      377 drivers/staging/rtl8723bs/include/hal_intf.h #define PHY_SetMacReg	PHY_SetBBReg