PHY_REG 27 drivers/net/dsa/lan9303_mdio.c mdio->bus->write(mdio->bus, PHY_ADDR(reg), PHY_REG(reg), val); PHY_REG 45 drivers/net/dsa/lan9303_mdio.c return mdio->bus->read(mdio->bus, PHY_ADDR(reg), PHY_REG(reg)); PHY_REG 2919 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(769, 17) /* Port General Configuration */ PHY_REG 2921 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(769, 25) /* Rate Adapter Control Register */ PHY_REG 2924 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(770, 16) /* KMRN FIFO's control/status register */ PHY_REG 2926 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(770, 17) /* KMRN Power Management Control Register */ PHY_REG 2928 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(770, 18) /* KMRN Inband Control Register */ PHY_REG 2930 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(770, 19) /* KMRN Diagnostic register */ PHY_REG 2933 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(770, 20) /* KMRN Acknowledge Timeouts register */ PHY_REG 2936 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(776, 18) /* Voltage regulator control register */ PHY_REG 2941 drivers/net/ethernet/intel/e1000/e1000_hw.h PHY_REG(776, 19) /* IGP3 Capability Register */ PHY_REG 2966 drivers/net/ethernet/intel/e1000/e1000_hw.h #define IGP3_KMRN_EXT_CTRL PHY_REG(770, 18) PHY_REG 1354 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_rphy(hw, PHY_REG(2, 21), &phy_reg); PHY_REG 1357 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_wphy(hw, PHY_REG(2, 21), phy_reg); PHY_REG 1362 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_rphy(hw, PHY_REG(769, 16), &phy_reg); PHY_REG 1363 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C); PHY_REG 1365 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_rphy(hw, PHY_REG(776, 16), &phy_reg); PHY_REG 1366 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040); PHY_REG 1368 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_rphy(hw, PHY_REG(769, 16), &phy_reg); PHY_REG 1369 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040); PHY_REG 1371 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_rphy(hw, PHY_REG(769, 20), &phy_reg); PHY_REG 1372 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400); PHY_REG 1387 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_rphy(hw, PHY_REG(0, 21), &phy_reg); PHY_REG 1388 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_wphy(hw, PHY_REG(0, 21), phy_reg & ~BIT(3)); PHY_REG 1390 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_rphy(hw, PHY_REG(776, 18), &phy_reg); PHY_REG 1391 drivers/net/ethernet/intel/e1000e/ethtool.c e1e_wphy(hw, PHY_REG(776, 18), phy_reg | 1); PHY_REG 1458 drivers/net/ethernet/intel/e1000e/ich8lan.c PHY_REG(776, 20), PHY_REG 1471 drivers/net/ethernet/intel/e1000e/ich8lan.c PHY_REG(776, 20), PHY_REG 1483 drivers/net/ethernet/intel/e1000e/ich8lan.c PHY_REG(776, 20), PHY_REG 2235 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x0100); PHY_REG 2241 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x4100); PHY_REG 2418 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(769, 25), 0x4431); PHY_REG 2533 drivers/net/ethernet/intel/e1000e/ich8lan.c e1e_rphy(hw, PHY_REG(769, 20), &phy_reg); PHY_REG 2534 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(769, 20), phy_reg | BIT(14)); PHY_REG 2597 drivers/net/ethernet/intel/e1000e/ich8lan.c e1e_rphy(hw, PHY_REG(769, 23), &data); PHY_REG 2600 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(769, 23), data); PHY_REG 2603 drivers/net/ethernet/intel/e1000e/ich8lan.c e1e_rphy(hw, PHY_REG(769, 16), &data); PHY_REG 2605 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(769, 16), data); PHY_REG 2608 drivers/net/ethernet/intel/e1000e/ich8lan.c e1e_rphy(hw, PHY_REG(776, 20), &data); PHY_REG 2611 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(776, 20), data); PHY_REG 2614 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0xF100); PHY_REG 2655 drivers/net/ethernet/intel/e1000e/ich8lan.c e1e_rphy(hw, PHY_REG(769, 23), &data); PHY_REG 2657 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(769, 23), data); PHY_REG 2660 drivers/net/ethernet/intel/e1000e/ich8lan.c e1e_rphy(hw, PHY_REG(769, 16), &data); PHY_REG 2662 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(769, 16), data); PHY_REG 2665 drivers/net/ethernet/intel/e1000e/ich8lan.c e1e_rphy(hw, PHY_REG(776, 20), &data); PHY_REG 2668 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(776, 20), data); PHY_REG 2671 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0x7E00); PHY_REG 2681 drivers/net/ethernet/intel/e1000e/ich8lan.c return e1e_wphy(hw, PHY_REG(769, 20), phy_reg & ~BIT(14)); PHY_REG 4958 drivers/net/ethernet/intel/e1000e/ich8lan.c ret_val = e1e_wphy(hw, PHY_REG(BM_PORT_CTRL_PAGE, 27), PHY_REG 109 drivers/net/ethernet/intel/e1000e/ich8lan.h #define IGP3_KMRN_DIAG PHY_REG(770, 19) /* KMRN Diagnostic */ PHY_REG 110 drivers/net/ethernet/intel/e1000e/ich8lan.h #define IGP3_VR_CTRL PHY_REG(776, 18) /* Voltage Regulator Control */ PHY_REG 117 drivers/net/ethernet/intel/e1000e/ich8lan.h #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17) PHY_REG 118 drivers/net/ethernet/intel/e1000e/ich8lan.h #define BM_RCTL PHY_REG(BM_WUC_PAGE, 0) PHY_REG 119 drivers/net/ethernet/intel/e1000e/ich8lan.h #define BM_WUC PHY_REG(BM_WUC_PAGE, 1) PHY_REG 120 drivers/net/ethernet/intel/e1000e/ich8lan.h #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2) PHY_REG 121 drivers/net/ethernet/intel/e1000e/ich8lan.h #define BM_WUS PHY_REG(BM_WUC_PAGE, 3) PHY_REG 136 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */ PHY_REG 137 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_MUX_DATA_CTRL PHY_REG(776, 16) PHY_REG 142 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision */ PHY_REG 143 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17) PHY_REG 144 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. */ PHY_REG 145 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19) PHY_REG 146 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Collision */ PHY_REG 147 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21) PHY_REG 148 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision */ PHY_REG 149 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24) PHY_REG 150 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision */ PHY_REG 151 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26) PHY_REG 152 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */ PHY_REG 153 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28) PHY_REG 154 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Tx with no CRS */ PHY_REG 155 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30) PHY_REG 163 drivers/net/ethernet/intel/e1000e/ich8lan.h #define CV_SMB_CTRL PHY_REG(769, 23) PHY_REG 167 drivers/net/ethernet/intel/e1000e/ich8lan.h #define I218_ULP_CONFIG1 PHY_REG(779, 16) PHY_REG 181 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_SMB_ADDR PHY_REG(768, 26) PHY_REG 197 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_OEM_BITS PHY_REG(768, 25) PHY_REG 203 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_KMRN_MODE_CTRL PHY_REG(769, 16) PHY_REG 207 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_KMRN_FIFO_CTRLSTA PHY_REG(770, 16) PHY_REG 212 drivers/net/ethernet/intel/e1000e/ich8lan.h #define HV_PM_CTRL PHY_REG(770, 17) PHY_REG 216 drivers/net/ethernet/intel/e1000e/ich8lan.h #define I217_PLL_CLOCK_GATE_REG PHY_REG(772, 28) PHY_REG 222 drivers/net/ethernet/intel/e1000e/ich8lan.h #define I217_INBAND_CTRL PHY_REG(770, 18) PHY_REG 227 drivers/net/ethernet/intel/e1000e/ich8lan.h #define I217_LPI_GPIO_CTRL PHY_REG(772, 18) PHY_REG 231 drivers/net/ethernet/intel/e1000e/ich8lan.h #define I82579_LPI_CTRL PHY_REG(772, 20) PHY_REG 265 drivers/net/ethernet/intel/e1000e/ich8lan.h #define I217_SxCTRL PHY_REG(BM_PORT_CTRL_PAGE, 28) PHY_REG 267 drivers/net/ethernet/intel/e1000e/ich8lan.h #define I217_CGFREG PHY_REG(772, 29) PHY_REG 269 drivers/net/ethernet/intel/e1000e/ich8lan.h #define I217_MEMPWR PHY_REG(772, 26) PHY_REG 3074 drivers/net/ethernet/intel/e1000e/netdev.c e1e_rphy(hw, PHY_REG(770, 26), &phy_data); PHY_REG 3077 drivers/net/ethernet/intel/e1000e/netdev.c e1e_wphy(hw, PHY_REG(770, 26), phy_data);