PHY_MARV_INT_MASK 2022 drivers/net/ethernet/marvell/skge.c 		gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_MSK);
PHY_MARV_INT_MASK 2024 drivers/net/ethernet/marvell/skge.c 		gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK);
PHY_MARV_INT_MASK 2029 drivers/net/ethernet/marvell/skge.c 	gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);/* disable PHY IRQs */
PHY_MARV_INT_MASK 2311 drivers/net/ethernet/marvell/skge.c 	gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK);
PHY_MARV_INT_MASK  567 drivers/net/ethernet/marvell/sky2.c 		gm_phy_write(hw, port, PHY_MARV_INT_MASK,
PHY_MARV_INT_MASK  687 drivers/net/ethernet/marvell/sky2.c 		gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
PHY_MARV_INT_MASK  689 drivers/net/ethernet/marvell/sky2.c 		gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
PHY_MARV_INT_MASK  921 drivers/net/ethernet/marvell/sky2.c 			 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
PHY_MARV_INT_MASK 2187 drivers/net/ethernet/marvell/sky2.c 	gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
PHY_MARV_INT_MASK 2210 drivers/net/ethernet/marvell/sky2.c 	gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);