PHY_28NM_HSIC_PLL_CTRL2   73 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) |
PHY_28NM_HSIC_PLL_CTRL2   75 drivers/phy/marvell/phy-pxa-28nm-hsic.c 		base + PHY_28NM_HSIC_PLL_CTRL2);
PHY_28NM_HSIC_PLL_CTRL2   78 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	if (!wait_for_reg(base + PHY_28NM_HSIC_PLL_CTRL2,
PHY_28NM_HSIC_PLL_CTRL2  144 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) &
PHY_28NM_HSIC_PLL_CTRL2  146 drivers/phy/marvell/phy-pxa-28nm-hsic.c 		base + PHY_28NM_HSIC_PLL_CTRL2);