PHY_28NM_HSIC_CTRL   95 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	reg = readl(base + PHY_28NM_HSIC_CTRL);
PHY_28NM_HSIC_CTRL   99 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(reg, base + PHY_28NM_HSIC_CTRL);
PHY_28NM_HSIC_CTRL  132 drivers/phy/marvell/phy-pxa-28nm-hsic.c 	writel(readl(base + PHY_28NM_HSIC_CTRL) & ~PHY_28NM_HSIC_S2H_HSIC_EN,
PHY_28NM_HSIC_CTRL  133 drivers/phy/marvell/phy-pxa-28nm-hsic.c 		base + PHY_28NM_HSIC_CTRL);