PHYS_PERIPHERAL_BLOCK   32 arch/sh/kernel/cpu/irq/intc-sh5.c #define INTC_BASE		PHYS_PERIPHERAL_BLOCK + \
PHYS_PERIPHERAL_BLOCK   18 arch/sh/kernel/cpu/sh5/clock-sh5.c #define CPRC_BASE	(PHYS_PERIPHERAL_BLOCK + CPRC_BLOCK_OFF)
PHYS_PERIPHERAL_BLOCK   23 arch/sh/kernel/cpu/sh5/setup-sh5.c 	DEFINE_RES_MEM(PHYS_PERIPHERAL_BLOCK + 0x01030000, 0x100),
PHYS_PERIPHERAL_BLOCK   41 arch/sh/kernel/cpu/sh5/setup-sh5.c 		.start	= PHYS_PERIPHERAL_BLOCK + 0x01040000,
PHYS_PERIPHERAL_BLOCK   42 arch/sh/kernel/cpu/sh5/setup-sh5.c 		.end	= PHYS_PERIPHERAL_BLOCK + 0x01040000 + 0x58 - 1,
PHYS_PERIPHERAL_BLOCK   70 arch/sh/kernel/cpu/sh5/setup-sh5.c #define TMU_BASE	PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF