PFM_OFFSET_MAGIC_2 153 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_BASE = -1 + PFM_OFFSET_MAGIC_2, /* counting symbol */ PFM_OFFSET_MAGIC_2 154 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_TOTAL_CYCLES = 0 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 155 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_COMPLETED_INSTRUCTION = 1 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 156 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_CONDITIONAL_BRANCH_MISPREDICT = 2 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 158 arch/nds32/include/asm/pmu.h 3 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 159 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_PREFETCH_INSTRUCTION_CACHE_HIT = 4 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 160 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_RET_MISPREDICT = 5 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 161 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_IMMEDIATE_J_INST = 6 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 162 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_MULTIPLY_INST = 7 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 163 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_16_BIT_INST = 8 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 164 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_FAILED_SCW_INST = 9 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 165 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_LD_AFTER_ST_CONFLICT_REPLAYS = 10 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 166 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_TAKEN_EXCEPTIONS = 12 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 167 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_STORES_COMPLETED = 13 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 168 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_UITLB_MISS = 14 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 169 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_UDTLB_MISS = 15 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 170 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_MTLB_MISS = 16 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 171 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_CODE_CACHE_MISS = 17 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 172 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_EMPTY_INST_QUEUE_STALL_CYCLES = 18 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 173 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_DATA_WRITE_BACK = 19 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 174 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_DATA_CACHE_MISS = 21 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 175 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_LOAD_DATA_CACHE_MISS = 22 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 176 arch/nds32/include/asm/pmu.h SPAV3_2_SEL_STORE_DATA_CACHE_MISS = 23 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 177 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_DLM_ACCESS = 24 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 178 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_LSU_BIU_REQUEST = 25 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 179 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_HPTWK_BIU_REQUEST = 26 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 180 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_DMA_BIU_REQUEST = 27 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 181 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_CODE_CACHE_FILL_BIU_REQUEST = 28 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 182 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_EXTERNAL_EVENTS = 29 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 183 arch/nds32/include/asm/pmu.h SPAV3_1_SEL_POP25 = 30 + PFM_OFFSET_MAGIC_2, PFM_OFFSET_MAGIC_2 214 arch/nds32/include/asm/pmu.h event -= PFM_OFFSET_MAGIC_2; PFM_OFFSET_MAGIC_2 98 arch/nds32/kernel/perf_event_cpu.c ev_type = PFM_OFFSET_MAGIC_2 + ev_type;