PFM_OFFSET_MAGIC_1   22 arch/nds32/include/asm/pmu.h #define PFM_OFFSET_MAGIC_2		(PFM_OFFSET_MAGIC_1 + 36)
PFM_OFFSET_MAGIC_1  116 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_BASE = -1 + PFM_OFFSET_MAGIC_1,	/* counting symbol */
PFM_OFFSET_MAGIC_1  117 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_TOTAL_CYCLES = 0 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  118 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_COMPLETED_INSTRUCTION = 1 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  119 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_CONDITIONAL_BRANCH = 2 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  120 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_TAKEN_CONDITIONAL_BRANCH = 3 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  121 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_PREFETCH_INSTRUCTION = 4 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  122 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_RET_INST = 5 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  123 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_JR_INST = 6 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  124 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_JAL_JRAL_INST = 7 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  125 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_NOP_INST = 8 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  126 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_SCW_INST = 9 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  127 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_ISB_DSB_INST = 10 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  128 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_CCTL_INST = 11 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  129 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_TAKEN_INTERRUPTS = 12 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  130 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_LOADS_COMPLETED = 13 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  131 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_UITLB_ACCESS = 14 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  132 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_UDTLB_ACCESS = 15 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  133 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_MTLB_ACCESS = 16 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  134 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_CODE_CACHE_ACCESS = 17 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  135 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_DATA_DEPENDENCY_STALL_CYCLES = 18 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  136 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_DATA_CACHE_MISS_STALL_CYCLES = 19 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  137 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_DATA_CACHE_ACCESS = 20 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  138 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_DATA_CACHE_MISS = 21 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  139 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_LOAD_DATA_CACHE_ACCESS = 22 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  140 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_STORE_DATA_CACHE_ACCESS = 23 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  141 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_ILM_ACCESS = 24 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  142 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_LSU_BIU_CYCLES = 25 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  143 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_HPTWK_BIU_CYCLES = 26 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  144 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_DMA_BIU_CYCLES = 27 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  145 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_CODE_CACHE_FILL_BIU_CYCLES = 28 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  146 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_LEGAL_UNALIGN_DCACHE_ACCESS = 29 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  147 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_PUSH25 = 30 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  148 arch/nds32/include/asm/pmu.h 	SPAV3_1_SEL_SYSCALLS_INST = 31 + PFM_OFFSET_MAGIC_1,
PFM_OFFSET_MAGIC_1  212 arch/nds32/include/asm/pmu.h 		event -= PFM_OFFSET_MAGIC_1;
PFM_OFFSET_MAGIC_1   93 arch/nds32/kernel/perf_event_cpu.c 		ev_type = PFM_OFFSET_MAGIC_1 + ev_type;