PFIT_CONTROL 284 drivers/gpu/drm/gma500/cdv_device.c regs->cdv.savePFIT_CONTROL = REG_READ(PFIT_CONTROL); PFIT_CONTROL 351 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PFIT_CONTROL, regs->cdv.savePFIT_CONTROL); PFIT_CONTROL 560 drivers/gpu/drm/gma500/cdv_intel_display.c pfit_control = REG_READ(PFIT_CONTROL); PFIT_CONTROL 766 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(PFIT_CONTROL, 0); PFIT_CONTROL 1103 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PFIT_CONTROL, pfit_control); PFIT_CONTROL 372 drivers/gpu/drm/gma500/cdv_intel_lvds.c REG_WRITE(PFIT_CONTROL, pfit_control); PFIT_CONTROL 211 drivers/gpu/drm/gma500/mdfld_device.c regs->savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); PFIT_CONTROL 339 drivers/gpu/drm/gma500/mdfld_device.c PSB_WVDC32(regs->savePFIT_CONTROL, PFIT_CONTROL); PFIT_CONTROL 106 drivers/gpu/drm/gma500/mdfld_intel_display.c pfit_control = REG_READ(PFIT_CONTROL); PFIT_CONTROL 757 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(PFIT_CONTROL, 0); PFIT_CONTROL 348 drivers/gpu/drm/gma500/oaktrail_crtc.c pfit_control = REG_READ(PFIT_CONTROL); PFIT_CONTROL 419 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(PFIT_CONTROL, 0); PFIT_CONTROL 239 drivers/gpu/drm/gma500/oaktrail_device.c regs->psb.savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); PFIT_CONTROL 363 drivers/gpu/drm/gma500/oaktrail_device.c PSB_WVDC32(regs->psb.savePFIT_CONTROL, PFIT_CONTROL); PFIT_CONTROL 129 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, 0); PFIT_CONTROL 135 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); PFIT_CONTROL 139 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | PFIT_CONTROL 142 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | PFIT_CONTROL 145 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); PFIT_CONTROL 147 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); PFIT_CONTROL 82 drivers/gpu/drm/gma500/psb_intel_display.c pfit_control = REG_READ(PFIT_CONTROL); PFIT_CONTROL 208 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(PFIT_CONTROL, 0); PFIT_CONTROL 268 drivers/gpu/drm/gma500/psb_intel_lvds.c lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL); PFIT_CONTROL 309 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL); PFIT_CONTROL 485 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PFIT_CONTROL, pfit_control); PFIT_CONTROL 6670 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE); PFIT_CONTROL 6674 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PFIT_CONTROL, crtc_state->gmch_pfit.control); PFIT_CONTROL 6979 drivers/gpu/drm/i915/display/intel_display.c I915_READ(PFIT_CONTROL)); PFIT_CONTROL 6980 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PFIT_CONTROL, 0); PFIT_CONTROL 8544 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(PFIT_CONTROL); PFIT_CONTROL 146 drivers/gpu/drm/i915/display/intel_lvds.c tmp = I915_READ(PFIT_CONTROL); PFIT_CONTROL 890 drivers/gpu/drm/i915/display/intel_overlay.c u32 pfit_control = I915_READ(PFIT_CONTROL);