PERF_CSTATE_PKG_C6_RES 259 arch/x86/events/intel/cstate.c [PERF_CSTATE_PKG_C6_RES] = { MSR_PKG_C6_RESIDENCY, &group_cstate_pkg_c6, test_msr }, PERF_CSTATE_PKG_C6_RES 509 arch/x86/events/intel/cstate.c BIT(PERF_CSTATE_PKG_C6_RES) | PERF_CSTATE_PKG_C6_RES 520 arch/x86/events/intel/cstate.c BIT(PERF_CSTATE_PKG_C6_RES) | PERF_CSTATE_PKG_C6_RES 531 arch/x86/events/intel/cstate.c BIT(PERF_CSTATE_PKG_C6_RES) | PERF_CSTATE_PKG_C6_RES 546 arch/x86/events/intel/cstate.c BIT(PERF_CSTATE_PKG_C6_RES) | PERF_CSTATE_PKG_C6_RES 559 arch/x86/events/intel/cstate.c BIT(PERF_CSTATE_PKG_C6_RES) | PERF_CSTATE_PKG_C6_RES 570 arch/x86/events/intel/cstate.c .pkg_events = BIT(PERF_CSTATE_PKG_C6_RES), PERF_CSTATE_PKG_C6_RES 580 arch/x86/events/intel/cstate.c BIT(PERF_CSTATE_PKG_C6_RES), PERF_CSTATE_PKG_C6_RES 592 arch/x86/events/intel/cstate.c BIT(PERF_CSTATE_PKG_C6_RES) | PERF_CSTATE_PKG_C6_RES 662 arch/x86/events/intel/cstate.c pkg_msr[PERF_CSTATE_PKG_C6_RES].msr = MSR_PKG_C7_RESIDENCY;