PERF_CSTATE_CORE_C7_RES  175 arch/x86/events/intel/cstate.c 	[PERF_CSTATE_CORE_C7_RES] = { MSR_CORE_C7_RESIDENCY,	&group_cstate_core_c7,	test_msr },
PERF_CSTATE_CORE_C7_RES  516 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C7_RES),
PERF_CSTATE_CORE_C7_RES  527 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C7_RES),
PERF_CSTATE_CORE_C7_RES  542 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C7_RES),
PERF_CSTATE_CORE_C7_RES  555 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C7_RES),