PERF_CSTATE_CORE_C6_RES  174 arch/x86/events/intel/cstate.c 	[PERF_CSTATE_CORE_C6_RES] = { MSR_CORE_C6_RESIDENCY,	&group_cstate_core_c6,	test_msr },
PERF_CSTATE_CORE_C6_RES  506 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C6_RES),
PERF_CSTATE_CORE_C6_RES  515 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C6_RES) |
PERF_CSTATE_CORE_C6_RES  526 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C6_RES) |
PERF_CSTATE_CORE_C6_RES  541 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C6_RES) |
PERF_CSTATE_CORE_C6_RES  554 arch/x86/events/intel/cstate.c 	.core_events		= BIT(PERF_CSTATE_CORE_C6_RES) |
PERF_CSTATE_CORE_C6_RES  568 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C6_RES),
PERF_CSTATE_CORE_C6_RES  576 arch/x86/events/intel/cstate.c 	.core_events		= BIT(PERF_CSTATE_CORE_C6_RES),
PERF_CSTATE_CORE_C6_RES  588 arch/x86/events/intel/cstate.c 				  BIT(PERF_CSTATE_CORE_C6_RES),
PERF_CSTATE_CORE_C6_RES  666 arch/x86/events/intel/cstate.c 		pkg_msr[PERF_CSTATE_CORE_C6_RES].msr = MSR_KNL_CORE_C6_RESIDENCY;