PERF_CSTATE_CORE_C1_RES 172 arch/x86/events/intel/cstate.c [PERF_CSTATE_CORE_C1_RES] = { MSR_CORE_C1_RES, &group_cstate_core_c1, test_msr }, PERF_CSTATE_CORE_C1_RES 539 arch/x86/events/intel/cstate.c .core_events = BIT(PERF_CSTATE_CORE_C1_RES) | PERF_CSTATE_CORE_C1_RES 567 arch/x86/events/intel/cstate.c .core_events = BIT(PERF_CSTATE_CORE_C1_RES) | PERF_CSTATE_CORE_C1_RES 586 arch/x86/events/intel/cstate.c .core_events = BIT(PERF_CSTATE_CORE_C1_RES) |