PERF_COUNT_HW_CACHE_REFERENCES 127 arch/alpha/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, PERF_COUNT_HW_CACHE_REFERENCES 119 arch/arc/include/asm/perf_event.h [PERF_COUNT_HW_CACHE_REFERENCES] = "imemrdc", /* Instr: mem read cached */ PERF_COUNT_HW_CACHE_REFERENCES 162 arch/arm/kernel/perf_event_v7.c [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, PERF_COUNT_HW_CACHE_REFERENCES 211 arch/arm/kernel/perf_event_v7.c [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, PERF_COUNT_HW_CACHE_REFERENCES 255 arch/arm/kernel/perf_event_v7.c [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, PERF_COUNT_HW_CACHE_REFERENCES 301 arch/arm/kernel/perf_event_v7.c [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, PERF_COUNT_HW_CACHE_REFERENCES 350 arch/arm/kernel/perf_event_v7.c [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, PERF_COUNT_HW_CACHE_REFERENCES 399 arch/arm/kernel/perf_event_v7.c [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, PERF_COUNT_HW_CACHE_REFERENCES 43 arch/arm64/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1D_CACHE, PERF_COUNT_HW_CACHE_REFERENCES 717 arch/csky/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, PERF_COUNT_HW_CACHE_REFERENCES 831 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x45, CNTR_EVEN | CNTR_ODD }, PERF_COUNT_HW_CACHE_REFERENCES 847 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x2b, CNTR_ALL }, PERF_COUNT_HW_CACHE_REFERENCES 864 arch/mips/kernel/perf_event_mipsxx.c [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x04, CNTR_ALL }, /* PAPI_L1_ICA */ PERF_COUNT_HW_CACHE_REFERENCES 231 arch/nds32/include/asm/pmu.h [PERF_COUNT_HW_CACHE_REFERENCES] = SPAV3_1_SEL_DATA_CACHE_ACCESS, PERF_COUNT_HW_CACHE_REFERENCES 608 arch/powerpc/perf/power5+-pmu.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x1c10a8, /* LD_REF_L1 */ PERF_COUNT_HW_CACHE_REFERENCES 550 arch/powerpc/perf/power5-pmu.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x4c1090, /* LD_REF_L1 */ PERF_COUNT_HW_CACHE_REFERENCES 470 arch/powerpc/perf/power6-pmu.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x280030, /* LD_REF_L1 */ PERF_COUNT_HW_CACHE_REFERENCES 322 arch/powerpc/perf/power7-pmu.c [PERF_COUNT_HW_CACHE_REFERENCES] = PM_LD_REF_L1, PERF_COUNT_HW_CACHE_REFERENCES 203 arch/powerpc/perf/power8-pmu.c [PERF_COUNT_HW_CACHE_REFERENCES] = PM_LD_REF_L1, PERF_COUNT_HW_CACHE_REFERENCES 260 arch/powerpc/perf/power9-pmu.c [PERF_COUNT_HW_CACHE_REFERENCES] = PM_LD_REF_L1, PERF_COUNT_HW_CACHE_REFERENCES 422 arch/powerpc/perf/ppc970-pmu.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x8810, /* PM_LD_REF_L1 */ PERF_COUNT_HW_CACHE_REFERENCES 45 arch/riscv/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = RISCV_OP_UNSUPP, PERF_COUNT_HW_CACHE_REFERENCES 185 arch/s390/kernel/perf_cpum_cf.c [PERF_COUNT_HW_CACHE_REFERENCES] = -1, PERF_COUNT_HW_CACHE_REFERENCES 195 arch/s390/kernel/perf_cpum_cf.c [PERF_COUNT_HW_CACHE_REFERENCES] = -1, PERF_COUNT_HW_CACHE_REFERENCES 77 arch/sh/kernel/cpu/sh4/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0006, /* I-cache */ PERF_COUNT_HW_CACHE_REFERENCES 102 arch/sh/kernel/cpu/sh4a/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0029, /* I-cache */ PERF_COUNT_HW_CACHE_REFERENCES 211 arch/sparc/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x0009, PIC_LOWER }, PERF_COUNT_HW_CACHE_REFERENCES 349 arch/sparc/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = { 0, PIC_NONE }, PERF_COUNT_HW_CACHE_REFERENCES 482 arch/sparc/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x0208, PIC_UPPER | PIC_LOWER }, PERF_COUNT_HW_CACHE_REFERENCES 619 arch/sparc/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = { (3 << 6) | 0x04 }, PERF_COUNT_HW_CACHE_REFERENCES 233 arch/x86/events/amd/core.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x077d, PERF_COUNT_HW_CACHE_REFERENCES 248 arch/x86/events/amd/core.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60, PERF_COUNT_HW_CACHE_REFERENCES 34 arch/x86/events/intel/core.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x4f2e, PERF_COUNT_HW_CACHE_REFERENCES 4131 arch/x86/events/intel/core.c { PERF_COUNT_HW_CACHE_REFERENCES, "cache references" }, PERF_COUNT_HW_CACHE_REFERENCES 15 arch/x86/events/intel/knc.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0028, PERF_COUNT_HW_CACHE_REFERENCES 668 arch/x86/events/intel/p4.c [PERF_COUNT_HW_CACHE_REFERENCES] = PERF_COUNT_HW_CACHE_REFERENCES 14 arch/x86/events/intel/p6.c [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0f2e, /* L2_RQSTS:M:E:S:I */ PERF_COUNT_HW_CACHE_REFERENCES 39 arch/x86/kvm/pmu_amd.c [2] = { 0x7d, 0x07, PERF_COUNT_HW_CACHE_REFERENCES }, PERF_COUNT_HW_CACHE_REFERENCES 25 arch/x86/kvm/vmx/pmu_intel.c [3] = { 0x2e, 0x4f, PERF_COUNT_HW_CACHE_REFERENCES }, PERF_COUNT_HW_CACHE_REFERENCES 61 arch/xtensa/kernel/perf_event.c [PERF_COUNT_HW_CACHE_REFERENCES] = XTENSA_PMU_MASK(10, 0x1), PERF_COUNT_HW_CACHE_REFERENCES 706 tools/perf/tests/parse-events.c PERF_COUNT_HW_CACHE_REFERENCES == evsel->core.attr.config); PERF_COUNT_HW_CACHE_REFERENCES 67 tools/perf/util/parse-events.c [PERF_COUNT_HW_CACHE_REFERENCES] = {