PA_PERIPHERAL 32 arch/sh/include/mach-common/mach/sdk7780.h #define PA_RESERVED (PA_PERIPHERAL + 0) PA_PERIPHERAL 34 arch/sh/include/mach-common/mach/sdk7780.h #define PA_FPGA (PA_PERIPHERAL + 0x01000000) PA_PERIPHERAL 36 arch/sh/include/mach-common/mach/sdk7780.h #define PA_LAN (PA_PERIPHERAL + 0x01800000) PA_PERIPHERAL 30 arch/sh/include/mach-se/mach/se7721.h #define PA_PCIC PA_PERIPHERAL PA_PERIPHERAL 31 arch/sh/include/mach-se/mach/se7721.h #define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) PA_PERIPHERAL 32 arch/sh/include/mach-se/mach/se7721.h #define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) PA_PERIPHERAL 33 arch/sh/include/mach-se/mach/se7721.h #define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) PA_PERIPHERAL 34 arch/sh/include/mach-se/mach/se7721.h #define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000) PA_PERIPHERAL 31 arch/sh/include/mach-se/mach/se7722.h #define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ PA_PERIPHERAL 32 arch/sh/include/mach-se/mach/se7722.h #define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */ PA_PERIPHERAL 33 arch/sh/include/mach-se/mach/se7722.h #define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */ PA_PERIPHERAL 34 arch/sh/include/mach-se/mach/se7722.h #define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */ PA_PERIPHERAL 35 arch/sh/include/mach-se/mach/se7722.h #define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000) /* MR-SHPC-01 I/O window base */ PA_PERIPHERAL 50 arch/sh/include/mach-se/mach/se7722.h #define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */ PA_PERIPHERAL 51 arch/sh/include/mach-se/mach/se7722.h #define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ PA_PERIPHERAL 34 arch/sh/include/mach-se/mach/se7780.h #define PA_LAN (PA_PERIPHERAL + 0) /* SMC LAN91C111 */ PA_PERIPHERAL 35 arch/sh/include/mach-se/mach/se7780.h #define PA_LED_DISP (PA_PERIPHERAL + 0x02000000) /* 8words LED Display */ PA_PERIPHERAL 47 arch/sh/include/mach-se/mach/se7780.h #define PA_FPGA (PA_PERIPHERAL + 0x03000000) /* FPGA base address */