PAGE0 322 arch/parisc/boot/compressed/misc.c free_mem_end_ptr = PAGE0->imm_max_mem; PAGE0 947 arch/parisc/kernel/drivers.c (unsigned long)(PAGE0->mem_pdc_hi) << 32 | PAGE0 949 arch/parisc/kernel/drivers.c (unsigned long)PAGE0->mem_pdc); PAGE0 105 arch/parisc/kernel/firmware.c # define MEM_PDC (unsigned long)(PAGE0->mem_pdc_hi) << 32 | PAGE0->mem_pdc PAGE0 108 arch/parisc/kernel/firmware.c # define MEM_PDC (unsigned long)PAGE0->mem_pdc PAGE0 1251 arch/parisc/kernel/firmware.c real32_call(PAGE0->mem_cons.iodc_io, PAGE0 1252 arch/parisc/kernel/firmware.c (unsigned long)PAGE0->mem_cons.hpa, ENTRY_IO_COUT, PAGE0 1253 arch/parisc/kernel/firmware.c PAGE0->mem_cons.spa, __pa(PAGE0->mem_cons.dp.layers), PAGE0 1274 arch/parisc/kernel/firmware.c if (!PAGE0->mem_kbd.iodc_io) PAGE0 1279 arch/parisc/kernel/firmware.c real32_call(PAGE0->mem_kbd.iodc_io, PAGE0 1280 arch/parisc/kernel/firmware.c (unsigned long)PAGE0->mem_kbd.hpa, ENTRY_IO_CIN, PAGE0 1281 arch/parisc/kernel/firmware.c PAGE0->mem_kbd.spa, __pa(PAGE0->mem_kbd.dp.layers), PAGE0 166 arch/parisc/kernel/inventory.c npages = (PAGE_ALIGN(PAGE0->imm_max_mem) >> PAGE_SHIFT); PAGE0 99 arch/parisc/kernel/kexec.c *(unsigned long *)(virt + kexec_free_mem_offset) = PAGE0->mem_free; PAGE0 64 arch/parisc/kernel/kexec_file.c kbuf.buf_min = PAGE0->mem_free + PAGE_SIZE; PAGE0 225 arch/parisc/kernel/pdc_cons.c if (PAGE0->mem_cons.cl_class == CL_DUPLEX) PAGE0 226 arch/parisc/kernel/pdc_cons.c memcpy(&PAGE0->mem_kbd, &PAGE0->mem_cons, sizeof(PAGE0->mem_cons)); PAGE0 238 arch/parisc/kernel/processor.c boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */ PAGE0 393 arch/parisc/kernel/setup.c running_on_qemu = (memcmp(&PAGE0->pad0, "SeaBIOS", 8) == 0); PAGE0 299 arch/parisc/kernel/smp.c WARN_ON(((unsigned long)(PAGE0->mem_pdc_hi) << 32 PAGE0 300 arch/parisc/kernel/smp.c | PAGE0->mem_pdc) != pdce_proc); PAGE0 236 arch/parisc/kernel/time.c clocktick = (100 * PAGE0->mem_10msec) / HZ; PAGE0 239 arch/parisc/kernel/time.c cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */ PAGE0 277 arch/parisc/kernel/time.c 100 * PAGE0->mem_10msec); PAGE0 292 arch/parisc/mm/init.c memblock_reserve(0UL, (unsigned long)(PAGE0->mem_free + PAGE0 1543 drivers/parisc/sba_iommu.c if (PAGE0->mem_kbd.cl_class == CL_KEYBD) { PAGE0 1551 drivers/parisc/sba_iommu.c printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa, PAGE0 1552 drivers/parisc/sba_iommu.c PAGE0->mem_boot.spa, PAGE0->mem_boot.pad, PAGE0->mem_boot.cl_class); PAGE0 1563 drivers/parisc/sba_iommu.c if ((PAGE0->mem_boot.cl_class != CL_RANDOM) PAGE0 1564 drivers/parisc/sba_iommu.c && (PAGE0->mem_boot.cl_class != CL_SEQU)) { PAGE0 954 drivers/video/console/sticore.c sti = sti_try_rom_generic(PAGE0->proc_sti, hpa, NULL);