PACKET3 812 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0)); PACKET3 651 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0)); PACKET3 229 drivers/gpu/drm/amd/amdgpu/cikd.h #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1) PACKET3 259 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); PACKET3 278 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); PACKET3 304 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4)); PACKET3 331 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5)); PACKET3 403 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 416 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 457 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); PACKET3 512 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1); PACKET3 929 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 932 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 940 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 953 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); PACKET3 957 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 960 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 2720 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 2723 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 2731 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c PACKET3(PACKET3_SET_CONTEXT_REG, PACKET3 2743 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1)); PACKET3 2747 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 2750 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 2753 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); PACKET3 2768 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 4461 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER_CNST, 2); PACKET3 4463 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); PACKET3 4508 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 4513 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); PACKET3 4536 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6)); PACKET3 4580 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 4594 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 4603 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 4614 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 4648 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 4657 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3)); PACKET3 4730 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); PACKET3 4764 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); PACKET3 4786 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0)); PACKET3 4794 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4)); PACKET3 4822 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5197 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 5249 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 5283 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 1808 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 1830 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); PACKET3 1841 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 1844 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); PACKET3 1853 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 1873 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 1878 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); PACKET3 1880 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); PACKET3 1922 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1); PACKET3 2037 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5)); PACKET3 2045 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); PACKET3 2059 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 2066 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 2074 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 2077 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 2080 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 2313 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 2325 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 2327 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 2340 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 2351 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 2355 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 2357 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 2367 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 2890 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 2892 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 2900 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 2910 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); PACKET3 2914 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 2917 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 2981 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 2104 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); PACKET3 2151 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 2164 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); PACKET3 2168 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); PACKET3 2190 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 2202 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 2231 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5)); PACKET3 2268 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 2273 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); PACKET3 2275 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); PACKET3 2308 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 2313 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); PACKET3 2338 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 2371 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1); PACKET3 2544 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); PACKET3 2550 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 2553 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 2561 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 2569 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 2574 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 2577 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 2580 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 3217 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 3229 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 3231 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 3258 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 3271 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 3275 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 3277 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 3287 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 3980 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 3983 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 3991 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 4001 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 4027 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 4030 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 4097 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 4105 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 4113 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 4121 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5001 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 5033 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 853 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); PACKET3 895 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); PACKET3 1254 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 1257 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 1265 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 1276 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 1282 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 1285 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 1601 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); PACKET3 1607 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); PACKET3 1613 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); PACKET3 1621 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); PACKET3 1627 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); PACKET3 1633 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); PACKET3 1639 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); PACKET3 1647 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); PACKET3 1653 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); PACKET3 1659 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); PACKET3 1665 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); PACKET3 1673 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); PACKET3 4215 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 4218 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 4226 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c PACKET3(PACKET3_SET_CONTEXT_REG, PACKET3 4236 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 4241 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 4244 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 4248 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); PACKET3 4402 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); PACKET3 4416 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); PACKET3 4865 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4)); PACKET3 5209 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5217 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5225 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5233 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 6093 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 6106 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); PACKET3 6110 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); PACKET3 6124 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); PACKET3 6126 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); PACKET3 6166 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 6171 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); PACKET3 6190 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 6204 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 6224 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 6243 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 6256 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 6381 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5)); PACKET3 6401 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 6410 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 6421 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 6453 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 6462 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3)); PACKET3 6489 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4)); PACKET3 6518 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 6936 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 6981 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 7011 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 7221 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce)); PACKET3 7254 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_de)); PACKET3 808 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 822 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 856 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); PACKET3 898 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); PACKET3 1459 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 1462 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 1470 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 1481 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 1484 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 2137 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5)); PACKET3 3156 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 3159 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 3167 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c PACKET3(PACKET3_SET_CONTEXT_REG, PACKET3 3177 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 3180 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 3183 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); PACKET3 3188 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG,1)); PACKET3 3370 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); PACKET3 3384 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); PACKET3 3924 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4)); PACKET3 4235 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5)); PACKET3 4311 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); PACKET3 4318 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); PACKET3 4325 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); PACKET3 4333 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); PACKET3 4339 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); PACKET3 4346 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); PACKET3 4353 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); PACKET3 4361 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); PACKET3 5020 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); PACKET3 5022 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); PACKET3 5063 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 5068 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); PACKET3 5087 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6)); PACKET3 5132 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 5275 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5284 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5295 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 5308 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); PACKET3 5330 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); PACKET3 5342 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0)); PACKET3 5375 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 5383 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3)); PACKET3 5409 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4)); PACKET3 5437 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 6199 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 6250 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 6285 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c .nop = PACKET3(PACKET3_NOP, 0x3FFF), PACKET3 52 drivers/gpu/drm/amd/amdgpu/nvd.h #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1) PACKET3 172 drivers/gpu/drm/amd/amdgpu/si_enums.h #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1) PACKET3 1662 drivers/gpu/drm/amd/amdgpu/sid.h #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1) PACKET3 54 drivers/gpu/drm/amd/amdgpu/soc15d.h #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1) PACKET3 111 drivers/gpu/drm/amd/amdgpu/vid.h #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1) PACKET3 3478 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); PACKET3 3534 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 3563 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 3575 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 3602 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5)); PACKET3 3633 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); PACKET3 3639 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 3694 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5)); PACKET3 3741 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 3744 drivers/gpu/drm/radeon/cik.c header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); PACKET3 3749 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); PACKET3 3755 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 3762 drivers/gpu/drm/radeon/cik.c header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); PACKET3 3803 drivers/gpu/drm/radeon/cik.c ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1); PACKET3 4004 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); PACKET3 4010 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 4013 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 4020 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 4024 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 4027 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 5697 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5711 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5718 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6)); PACKET3 5729 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5740 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5748 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 5761 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 6725 drivers/gpu/drm/radeon/cik.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 6728 drivers/gpu/drm/radeon/cik.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 6736 drivers/gpu/drm/radeon/cik.c cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 6746 drivers/gpu/drm/radeon/cik.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 6772 drivers/gpu/drm/radeon/cik.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 6775 drivers/gpu/drm/radeon/cik.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 8409 drivers/gpu/drm/radeon/cik.c nop = PACKET3(PACKET3_NOP, 0x3FFF); PACKET3 8413 drivers/gpu/drm/radeon/cik.c nop = PACKET3(PACKET3_NOP, 0x3FFF); PACKET3 1695 drivers/gpu/drm/radeon/cikd.h #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1) PACKET3 2936 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, PACKET3(PACKET3_MODE_CONTROL, 0)); PACKET3 2941 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 2947 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, PACKET3(PACKET3_MEM_WRITE, 3)); PACKET3 2954 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); PACKET3 3008 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5)); PACKET3 3027 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 3033 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 3037 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 1411 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); PACKET3 1417 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 1433 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_MODE_CONTROL, 0)); PACKET3 1438 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 1444 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); PACKET3 1454 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); PACKET3 1560 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5)); PACKET3 1578 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 1584 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 1588 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 2708 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 2718 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 929 drivers/gpu/drm/radeon/r100.c radeon_ring_write(ring, PACKET3(PACKET3_BITBLT_MULTI, 8)); PACKET3 2696 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5)); PACKET3 2841 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 2879 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); PACKET3 2885 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 2893 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); PACKET3 2898 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); PACKET3 2901 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 2905 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 2936 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); PACKET3 2943 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 2990 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 3001 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_CP_DMA, 4)); PACKET3 3010 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 3376 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 3382 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_MEM_WRITE, 3)); PACKET3 3389 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); PACKET3 3418 drivers/gpu/drm/radeon/r600.c ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1); PACKET3 3381 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 3384 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); PACKET3 3393 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); PACKET3 3412 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); PACKET3 3415 drivers/gpu/drm/radeon/si.c header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); PACKET3 3420 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 3426 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 3433 drivers/gpu/drm/radeon/si.c header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); PACKET3 3447 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); PACKET3 3450 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); PACKET3 3572 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5)); PACKET3 3581 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); PACKET3 3596 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 3602 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 3606 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 3609 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); PACKET3 5080 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5095 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5103 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); PACKET3 5111 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); PACKET3 5121 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); PACKET3 5726 drivers/gpu/drm/radeon/si.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 5729 drivers/gpu/drm/radeon/si.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); PACKET3 5737 drivers/gpu/drm/radeon/si.c cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); PACKET3 5747 drivers/gpu/drm/radeon/si.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); PACKET3 5768 drivers/gpu/drm/radeon/si.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); PACKET3 5771 drivers/gpu/drm/radeon/si.c buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); PACKET3 1599 drivers/gpu/drm/radeon/sid.h #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)