P                   9 arch/alpha/include/asm/switch_to.h #define switch_to(P,N,L)						 \
P                  11 arch/alpha/include/asm/switch_to.h     (L) = alpha_switch_to(virt_to_phys(&task_thread_info(N)->pcb), (P)); \
P                 812 arch/mips/kernel/perf_event_mipsxx.c 	[PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
P                 821 arch/mips/kernel/perf_event_mipsxx.c 	[PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
P                 910 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_ACCESS)]	= { 0x15, CNTR_ODD, P },
P                 911 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_MISS)]	= { 0x16, CNTR_EVEN, P },
P                 914 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_ACCESS)]	= { 0x15, CNTR_ODD, P },
P                 915 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_MISS)]	= { 0x16, CNTR_EVEN, P },
P                 991 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_ACCESS)]	= { 0x1c, CNTR_ODD, P },
P                 992 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_MISS)]	= { 0x1d, CNTR_EVEN, P },
P                 995 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_ACCESS)]	= { 0x1c, CNTR_ODD, P },
P                 996 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_MISS)]	= { 0x1d, CNTR_EVEN, P },
P                1162 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_ACCESS)]	= { 28, CNTR_EVEN, P },
P                1163 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_MISS)]	= { 28, CNTR_ODD, P },
P                1166 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_ACCESS)]	= { 28, CNTR_EVEN, P },
P                1167 arch/mips/kernel/perf_event_mipsxx.c 		[C(RESULT_MISS)]	= { 28, CNTR_ODD, P },
P                1530 arch/mips/kernel/perf_event_mipsxx.c 		raw_event.range = P;
P                1541 arch/mips/kernel/perf_event_mipsxx.c 			raw_event.range = P;
P                1556 arch/mips/kernel/perf_event_mipsxx.c 		raw_event.range = P;
P                1566 arch/mips/kernel/perf_event_mipsxx.c 		raw_event.range = P;
P                1580 arch/mips/kernel/perf_event_mipsxx.c 		raw_event.range = P;
P                1597 arch/mips/kernel/perf_event_mipsxx.c 			raw_event.range = P;
P                1612 arch/mips/kernel/perf_event_mipsxx.c 			raw_event.range = P;
P                 179 arch/powerpc/perf/isa207-common.c 		ret |= P(SNOOP, HIT);
P                 184 arch/powerpc/perf/isa207-common.c 			ret |= P(SNOOP, HIT);
P                 186 arch/powerpc/perf/isa207-common.c 			ret |= P(SNOOP, HITM);
P                 191 arch/powerpc/perf/isa207-common.c 			ret |= P(SNOOP, HIT);
P                 193 arch/powerpc/perf/isa207-common.c 			ret |= P(SNOOP, HITM);
P                 224 arch/powerpc/perf/isa207-common.c 		dsrc->val |= (val == 1) ? P(OP, LOAD) : P(OP, STORE);
P                 215 arch/powerpc/perf/isa207-common.h #define PH(a, b)			(P(LVL, HIT) | P(a, b))
P                 216 arch/powerpc/perf/isa207-common.h #define PM(a, b)			(P(LVL, MISS) | P(a, b))
P                 108 arch/s390/include/asm/cpu_mf.h 	unsigned int P:1;	    /* 28 PSW Problem state		 */
P                1096 arch/s390/kernel/perf_cpum_sf.c 	psw_bits(regs.psw).pstate = basic->P;
P                  55 arch/x86/events/intel/ds.c #define OP_LH (P(OP, LOAD) | P(LVL, HIT))
P                  56 arch/x86/events/intel/ds.c #define LEVEL(x) P(LVLNUM, x)
P                  57 arch/x86/events/intel/ds.c #define REM P(REMOTE, REMOTE)
P                  58 arch/x86/events/intel/ds.c #define SNOOP_NONE_MISS (P(SNOOP, NONE) | P(SNOOP, MISS))
P                  62 arch/x86/events/intel/ds.c 	P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA),/* 0x00:ukn L3 */
P                  63 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, L1)  | LEVEL(L1) | P(SNOOP, NONE),  /* 0x01: L1 local */
P                  64 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, LFB) | LEVEL(LFB) | P(SNOOP, NONE), /* 0x02: LFB hit */
P                  65 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, L2)  | LEVEL(L2) | P(SNOOP, NONE),  /* 0x03: L2 hit */
P                  66 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, L3)  | LEVEL(L3) | P(SNOOP, NONE),  /* 0x04: L3 hit */
P                  67 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, L3)  | LEVEL(L3) | P(SNOOP, MISS),  /* 0x05: L3 hit, snoop miss */
P                  68 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, L3)  | LEVEL(L3) | P(SNOOP, HIT),   /* 0x06: L3 hit, snoop hit */
P                  69 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, L3)  | LEVEL(L3) | P(SNOOP, HITM),  /* 0x07: L3 hit, snoop hitm */
P                  70 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, REM_CCE1) | REM | LEVEL(L3) | P(SNOOP, HIT),  /* 0x08: L3 miss snoop hit */
P                  71 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, REM_CCE1) | REM | LEVEL(L3) | P(SNOOP, HITM), /* 0x09: L3 miss snoop hitm*/
P                  72 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, LOC_RAM)  | LEVEL(RAM) | P(SNOOP, HIT),       /* 0x0a: L3 miss, shared */
P                  73 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, REM_RAM1) | REM | LEVEL(L3) | P(SNOOP, HIT),  /* 0x0b: L3 miss, shared */
P                  74 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, LOC_RAM)  | LEVEL(RAM) | SNOOP_NONE_MISS,     /* 0x0c: L3 miss, excl */
P                  75 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, REM_RAM1) | LEVEL(RAM) | REM | SNOOP_NONE_MISS, /* 0x0d: L3 miss, excl */
P                  76 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, IO)  | LEVEL(NA) | P(SNOOP, NONE), /* 0x0e: I/O */
P                  77 arch/x86/events/intel/ds.c 	OP_LH | P(LVL, UNC) | LEVEL(NA) | P(SNOOP, NONE), /* 0x0f: uncached */
P                  83 arch/x86/events/intel/ds.c 	pebs_data_source[0x05] = OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT);
P                  84 arch/x86/events/intel/ds.c 	pebs_data_source[0x06] = OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HITM);
P                  85 arch/x86/events/intel/ds.c 	pebs_data_source[0x07] = OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HITM);
P                  92 arch/x86/events/intel/ds.c 	pebs_data_source[0x08] = OP_LH | pmem_or_l4 | P(SNOOP, HIT);
P                  93 arch/x86/events/intel/ds.c 	pebs_data_source[0x09] = OP_LH | pmem_or_l4 | REM | P(SNOOP, HIT);
P                  94 arch/x86/events/intel/ds.c 	pebs_data_source[0x0b] = OP_LH | LEVEL(RAM) | REM | P(SNOOP, NONE);
P                  95 arch/x86/events/intel/ds.c 	pebs_data_source[0x0c] = OP_LH | LEVEL(ANY_CACHE) | REM | P(SNOOPX, FWD);
P                  96 arch/x86/events/intel/ds.c 	pebs_data_source[0x0d] = OP_LH | LEVEL(ANY_CACHE) | REM | P(SNOOP, HITM);
P                 102 arch/x86/events/intel/ds.c 	u64 val = P(OP, STORE) | P(SNOOP, NA) | P(LVL, L1) | P(TLB, L2);
P                 114 arch/x86/events/intel/ds.c 		val |= P(TLB, MISS);
P                 116 arch/x86/events/intel/ds.c 		val |= P(TLB, HIT);
P                 124 arch/x86/events/intel/ds.c 		val |= P(LVL, HIT);
P                 126 arch/x86/events/intel/ds.c 		val |= P(LVL, MISS);
P                 132 arch/x86/events/intel/ds.c 		val |= P(LOCK, LOCKED);
P                 181 arch/x86/events/intel/ds.c 		val |= P(TLB, NA) | P(LOCK, NA);
P                 190 arch/x86/events/intel/ds.c 		val |= P(TLB, MISS) | P(TLB, L2);
P                 192 arch/x86/events/intel/ds.c 		val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2);
P                 198 arch/x86/events/intel/ds.c 		val |= P(LOCK, LOCKED);
P                 358 arch/x86/mm/dump_pagetables.c 			   pgprotval_t eff_in, unsigned long P)
P                 365 arch/x86/mm/dump_pagetables.c 		st->current_address = normalize_addr(P + i * PTE_LEVEL_MULT);
P                 406 arch/x86/mm/dump_pagetables.c 			   pgprotval_t eff_in, unsigned long P)
P                 414 arch/x86/mm/dump_pagetables.c 		st->current_address = normalize_addr(P + i * PMD_LEVEL_MULT);
P                 422 arch/x86/mm/dump_pagetables.c 					       P + i * PMD_LEVEL_MULT);
P                 439 arch/x86/mm/dump_pagetables.c 			   pgprotval_t eff_in, unsigned long P)
P                 448 arch/x86/mm/dump_pagetables.c 		st->current_address = normalize_addr(P + i * PUD_LEVEL_MULT);
P                 456 arch/x86/mm/dump_pagetables.c 					       P + i * PUD_LEVEL_MULT);
P                 472 arch/x86/mm/dump_pagetables.c 			   pgprotval_t eff_in, unsigned long P)
P                 479 arch/x86/mm/dump_pagetables.c 		return walk_pud_level(m, st, __p4d(pgd_val(addr)), eff_in, P);
P                 484 arch/x86/mm/dump_pagetables.c 		st->current_address = normalize_addr(P + i * P4D_LEVEL_MULT);
P                 492 arch/x86/mm/dump_pagetables.c 					       P + i * P4D_LEVEL_MULT);
P                 543 crypto/asymmetric_keys/x509_cert_parser.c #define DD2bin(P) ({ unsigned x = dec2bin(P[0]) * 10 + dec2bin(P[1]); P += 2; x; })
P                 168 crypto/async_tx/async_pq.c 						      &P(blocks, disks), 2,
P                 173 crypto/async_tx/async_pq.c 	BUG_ON(disks > MAX_DISKS || !(P(blocks, disks) || Q(blocks, disks)));
P                 211 crypto/async_tx/async_pq.c 		if (P(blocks, disks))
P                 212 crypto/async_tx/async_pq.c 			unmap->addr[j++] = dma_map_page(device->dev, P(blocks, disks),
P                 241 crypto/async_tx/async_pq.c 	if (!P(blocks, disks)) {
P                 242 crypto/async_tx/async_pq.c 		P(blocks, disks) = pq_scribble_page;
P                 318 crypto/async_tx/async_pq.c 		if (!P(blocks, disks)) {
P                 322 crypto/async_tx/async_pq.c 			pq[0] = dma_map_page(dev, P(blocks, disks),
P                 357 crypto/async_tx/async_pq.c 		struct page *p_src = P(blocks, disks);
P                 392 crypto/async_tx/async_pq.c 			P(blocks, disks) = NULL;
P                 403 crypto/async_tx/async_pq.c 		P(blocks, disks) = p_src;
P                 304 crypto/blowfish_common.c #define ROUND(a, b, n) ({ b ^= P[n]; a ^= bf_F(b); })
P                 312 crypto/blowfish_common.c 	const u32 *P = bctx->p;
P                 334 crypto/blowfish_common.c 	yl ^= P[16];
P                 335 crypto/blowfish_common.c 	yr ^= P[17];
P                 347 crypto/blowfish_common.c 	u32 *P = ctx->p;
P                 359 crypto/blowfish_common.c 		P[i] = bf_pbox[i];
P                 368 crypto/blowfish_common.c 		P[i] = P[i] ^ temp;
P                 378 crypto/blowfish_common.c 		P[i] = data[0];
P                 379 crypto/blowfish_common.c 		P[i + 1] = data[1];
P                  34 crypto/blowfish_generic.c #define ROUND(a, b, n) ({ b ^= P[n]; a ^= bf_F(b); })
P                  41 crypto/blowfish_generic.c 	const u32 *P = ctx->p;
P                  63 crypto/blowfish_generic.c 	yl ^= P[16];
P                  64 crypto/blowfish_generic.c 	yr ^= P[17];
P                  75 crypto/blowfish_generic.c 	const u32 *P = ctx->p;
P                  97 crypto/blowfish_generic.c 	yl ^= P[1];
P                  98 crypto/blowfish_generic.c 	yr ^= P[0];
P                 553 drivers/gpio/gpio-tegra186.c 	TEGRA186_MAIN_GPIO_PORT( P, 0x4000, 7, 4),
P                 618 drivers/gpio/gpio-tegra186.c 	TEGRA194_MAIN_GPIO_PORT( P, 0x2a00, 8, 2),
P                 165 drivers/gpu/drm/i2c/ch7006_mode.c 	__MODE(29500, 720, 576, 944, 625, P, P, 145.592111636, 1_1, 0x7, PAL_LIKE, 800, 600),
P                 166 drivers/gpu/drm/i2c/ch7006_mode.c 	MODE(36000, 800, 600, 960, 750, P, P, 119.304647022, 5_6, 0x6, PAL_LIKE),
P                 167 drivers/gpu/drm/i2c/ch7006_mode.c 	MODE(39000, 800, 600, 936, 836, P, P, 110.127366499, 3_4, 0x1, PAL_LIKE),
P                 168 drivers/gpu/drm/i2c/ch7006_mode.c 	MODE(39273, 800, 600, 1040, 630, P, P, 145.816809399, 5_6, 0x4, NTSC_LIKE),
P                 169 drivers/gpu/drm/i2c/ch7006_mode.c 	MODE(43636, 800, 600, 1040, 700, P, P, 131.235128487, 3_4, 0x2, NTSC_LIKE),
P                 170 drivers/gpu/drm/i2c/ch7006_mode.c 	MODE(47832, 800, 600, 1064, 750, P, P, 119.723275165, 7_10, 0x1, NTSC_LIKE),
P                1452 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OBUF_0Y);
P                1453 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OBUF_1Y);
P                1454 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OBUF_0U);
P                1455 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OBUF_0V);
P                1456 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OBUF_1U);
P                1457 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OBUF_1V);
P                1458 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OSTRIDE);
P                1459 drivers/gpu/drm/i915/display/intel_overlay.c 	P(YRGB_VPH);
P                1460 drivers/gpu/drm/i915/display/intel_overlay.c 	P(UV_VPH);
P                1461 drivers/gpu/drm/i915/display/intel_overlay.c 	P(HORZ_PH);
P                1462 drivers/gpu/drm/i915/display/intel_overlay.c 	P(INIT_PHS);
P                1463 drivers/gpu/drm/i915/display/intel_overlay.c 	P(DWINPOS);
P                1464 drivers/gpu/drm/i915/display/intel_overlay.c 	P(DWINSZ);
P                1465 drivers/gpu/drm/i915/display/intel_overlay.c 	P(SWIDTH);
P                1466 drivers/gpu/drm/i915/display/intel_overlay.c 	P(SWIDTHSW);
P                1467 drivers/gpu/drm/i915/display/intel_overlay.c 	P(SHEIGHT);
P                1468 drivers/gpu/drm/i915/display/intel_overlay.c 	P(YRGBSCALE);
P                1469 drivers/gpu/drm/i915/display/intel_overlay.c 	P(UVSCALE);
P                1470 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OCLRC0);
P                1471 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OCLRC1);
P                1472 drivers/gpu/drm/i915/display/intel_overlay.c 	P(DCLRKV);
P                1473 drivers/gpu/drm/i915/display/intel_overlay.c 	P(DCLRKM);
P                1474 drivers/gpu/drm/i915/display/intel_overlay.c 	P(SCLRKVH);
P                1475 drivers/gpu/drm/i915/display/intel_overlay.c 	P(SCLRKVL);
P                1476 drivers/gpu/drm/i915/display/intel_overlay.c 	P(SCLRKEN);
P                1477 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OCONFIG);
P                1478 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OCMD);
P                1479 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OSTART_0Y);
P                1480 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OSTART_1Y);
P                1481 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OSTART_0U);
P                1482 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OSTART_0V);
P                1483 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OSTART_1U);
P                1484 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OSTART_1V);
P                1485 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OTILEOFF_0Y);
P                1486 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OTILEOFF_1Y);
P                1487 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OTILEOFF_0U);
P                1488 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OTILEOFF_0V);
P                1489 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OTILEOFF_1U);
P                1490 drivers/gpu/drm/i915/display/intel_overlay.c 	P(OTILEOFF_1V);
P                1491 drivers/gpu/drm/i915/display/intel_overlay.c 	P(FASTHSCALE);
P                1492 drivers/gpu/drm/i915/display/intel_overlay.c 	P(UVSCALEV);
P                  64 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 	u32 P = (coef & 0x003f0000) >> 16;
P                  76 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 		P = 1;
P                  94 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 	return sclk * N / M / P;
P                 255 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 	int N, M, P, ret;
P                 265 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 	ret = gt215_pll_calc(subdev, &limits, freq, &N, NULL, &M, &P);
P                 269 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c 	*coef = (P << 16) | (N << 8) | M;
P                  65 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 	u32 P = (coef & 0x003f0000) >> 16;
P                  78 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 		P = 1;
P                  82 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 		P = (coef & 0x10000000) ? 2 : 1;
P                  98 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 	if (P == 0)
P                  99 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 		P = 1;
P                 102 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 	return sclk / (M * P);
P                 268 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 	int N, M, P, ret;
P                 278 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 	ret = gt215_pll_calc(subdev, &limits, freq, &N, NULL, &M, &P);
P                 282 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c 	*coef = (P << 16) | (N << 8) | M;
P                 112 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	u32 sclk = 0, P = 1, N = 1, M = 1;
P                 120 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 			P = (coef & 0x003f0000) >> 16;
P                 126 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 				P = 1;
P                 134 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	MP = M * P;
P                 241 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	int P, N, M, diff;
P                 263 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 	ret = gt215_pll_calc(subdev, &limits, khz, &N, NULL, &M, &P);
P                 265 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c 		info->pll = (P << 16) | (N << 8) | M;
P                  87 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	u32 P = 0;
P                 107 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		P = (nvkm_rd32(device, 0x004028) & 0x00070000) >> 16;
P                 110 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;
P                 112 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		case 0x00000002: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4) >> P;
P                 113 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		case 0x00000003: return read_pll(clk, 0x004028) >> P;
P                 130 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		P = (nvkm_rd32(device, 0x004020) & 0x00070000) >> 16;
P                 134 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 				return nvkm_clk_read(&clk->base, nv_clk_src_href) >> P;
P                 135 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 			return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;
P                 137 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		case 0x00000020: return read_pll(clk, 0x004028) >> P;
P                 138 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		case 0x00000030: return read_pll(clk, 0x004020) >> P;
P                 145 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		P = (read_div(clk) & 0x00000700) >> 8;
P                 149 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 			return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
P                 152 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 			return 500000 >> P;
P                 166 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	 u32 clock, int *N, int *M, int *P)
P                 181 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	return nv04_pll_calc(subdev, &pll, clock, N, M, NULL, NULL, P);
P                  35 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c 	int N1, M1, N2, M2, P;
P                  36 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c 	int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);
P                  43 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c 		pv->log2P = P;
P                  44 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	int P = (ctrl & 0x00070000) >> 16;
P                  52 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	return khz >> P;
P                  65 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	int P = (ctrl & 0x00070000) >> 16;
P                  78 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c 	return khz >> P;
P                  58 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 	int P, N, M, id;
P                  75 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		P    =  (coef & 0x00070000) >> 16;
P                  83 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		P    = (coef & 0x00070000) >> 16;
P                 109 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		P    = (nvkm_rd32(device, 0x00e824 + (id * 0x28)) >> 16) & 7;
P                 110 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		P   += (coef & 0x00070000) >> 16;
P                 119 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		return (ref * N / M) >> P;
P                 198 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 	u32 P = 0;
P                 221 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 			P = (nvkm_rd32(device, 0x004028) & 0x00070000) >> 16;
P                 223 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;
P                 225 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		case 0x00000002: return read_pll(clk, 0x004020) >> P;
P                 226 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		case 0x00000003: return read_pll(clk, 0x004028) >> P;
P                 230 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		P = (nvkm_rd32(device, 0x004020) & 0x00070000) >> 16;
P                 234 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_host) >> P;
P                 235 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 			return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;
P                 237 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		case 0x00000020: return read_pll(clk, 0x004028) >> P;
P                 238 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		case 0x00000030: return read_pll(clk, 0x004020) >> P;
P                 242 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		P = (nvkm_rd32(device, 0x004008) & 0x00070000) >> 16;
P                 246 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;
P                 249 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_href) >> P;
P                 252 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 			return read_pll(clk, 0x004008) >> P;
P                 256 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 		P = (read_div(clk) & 0x00000700) >> 8;
P                 267 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 					return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
P                 268 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;
P                 273 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 					return read_pll(clk, 0x004028) >> P;
P                 274 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return read_pll(clk, 0x004030) >> P;
P                 276 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
P                 282 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;
P                 286 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_hclkm3d2) >> P;
P                 288 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_mem) >> P;
P                 304 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 			P = (read_div(clk) & 0x00000007) >> 0;
P                 310 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 				return nvkm_clk_read(&clk->base, nv_clk_src_hclkm3) >> P;
P                 325 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c calc_pll(struct nv50_clk *clk, u32 reg, u32 idx, int *N, int *M, int *P)
P                 340 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 	return nv04_pll_calc(subdev, &pll, idx, N, M, NULL, NULL, P);
P                   9 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pll.h 		  int *N1, int *M1, int *N2, int *M2, int *P);
P                  11 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pll.h 		  int *N, int *fN, int *M, int *P);
P                  31 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 	       u32 freq, int *pN, int *pfN, int *pM, int *P)
P                  36 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 	*P = info->vco1.max_freq / freq;
P                  37 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 	if (*P > info->max_p)
P                  38 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 		*P = info->max_p;
P                  39 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 	if (*P < info->min_p)
P                  40 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 		*P = info->min_p;
P                  49 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 		u32 tmp = freq * *P * M;
P                  67 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 		err = abs(freq - (info->refclk * N / M / *P));
P                  86 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c 	return info->refclk * *pN / *pM / *P;
P                  49 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 	int M, N, thisP, P;
P                  73 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 	P = 1 << maxP;
P                  74 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 	if ((clk * P) < minvco) {
P                  84 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 		P = 1 << thisP;
P                  85 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 		clkP = clk * P;
P                 107 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 			calcclk = ((N * crystal + P/2) / P + M/2) / M;
P                 228 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 	      int *N1, int *M1, int *N2, int *M2, int *P)
P                 233 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 		ret = getMNP_single(subdev, info, freq, N1, M1, P);
P                 239 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c 		ret = getMNP_double(subdev, info, freq, N1, M1, N2, M2, P);
P                  37 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c 	int N, fN, M, P;
P                  44 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c 	ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P);
P                  54 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c 		nvkm_wr32(device, info.reg + 0x04, (P << 16) | (N << 8) | M);
P                  37 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c 	int N, fN, M, P;
P                  44 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c 	ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P);
P                  53 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c 						(P << 16) | (M << 8) | N);
P                  35 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c 	int N, fN, M, P;
P                  42 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c 	ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P);
P                  52 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c 		nvkm_wr32(device, 0x00ef04 + (head * 0x40), (P << 16) |
P                 363 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	int N1, M1, N2, M2, P;
P                 370 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);
P                 379 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	pv.log2P = P;
P                  41 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 	int N1, M1, N2, M2, P;
P                  50 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 	ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);
P                  61 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 		nvkm_mask(device, info.reg + 8, 0x7fff00ff, (P  << 28) |
P                  66 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 					        (P << 22) |
P                  68 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 						(P << 16));
P                  72 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 		nvkm_mask(device, info.reg + 0, 0x00070000, (P << 16));
P                  35 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c 	int N, fN, M, P;
P                  42 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c 	ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P);
P                  52 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c 		nvkm_wr32(device, 0x00ef04 + (head * 0x40), (P << 16) |
P                 143 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c 	int N1, M1, P;
P                 216 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c 				     &N1, NULL, &M1, &P);
P                 225 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c 		ram_wr32(fuc, 0x10fe24, (P << 16) | (N1 << 8) | M1);
P                 231 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c 				     &N1, NULL, &M1, &P);
P                 238 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c 		ram_wr32(fuc, 0x132004, (P << 16) | (N1 << 8) | M1);
P                 982 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c gk104_calc_pll_output(int fN, int M, int N, int P, int clk)
P                 984 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c 	return ((clk * N) + (((u16)(fN + 4096) * clk) >> 13)) / (M * P);
P                 231 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 	int N1, M1, N2, M2, P;
P                 332 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 				    &N1, &M1, &N2, &M2, &P);
P                 349 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 	r004008 |= (mpll.bias_p << 19) | (P << 22) | (P << 16);
P                 131 drivers/infiniband/hw/usnic/usnic_ib.h #define UPDATE_PTR_LEFT(N, P, L)			\
P                 134 drivers/infiniband/hw/usnic/usnic_ib.h 	P += (N);					\
P                 360 drivers/isdn/mISDN/dsp_blowfish.c #define EROUND(a, b, n)  do { b ^= P[n]; a ^= bf_F(b); } while (0)
P                 361 drivers/isdn/mISDN/dsp_blowfish.c #define DROUND(a, b, n)  do { a ^= bf_F(b); b ^= P[n]; } while (0)
P                 374 drivers/isdn/mISDN/dsp_blowfish.c 	u32 *P = dsp->bf_p;
P                 422 drivers/isdn/mISDN/dsp_blowfish.c 		yl ^= P[16];
P                 423 drivers/isdn/mISDN/dsp_blowfish.c 		yr ^= P[17];
P                 466 drivers/isdn/mISDN/dsp_blowfish.c 	u32 *P = dsp->bf_p;
P                 520 drivers/isdn/mISDN/dsp_blowfish.c 		yr ^= P[17];
P                 521 drivers/isdn/mISDN/dsp_blowfish.c 		yl ^= P[16];
P                 563 drivers/isdn/mISDN/dsp_blowfish.c encrypt_block(const u32 *P, const u32 *S, u32 *dst, u32 *src)
P                 585 drivers/isdn/mISDN/dsp_blowfish.c 	yl ^= P[16];
P                 586 drivers/isdn/mISDN/dsp_blowfish.c 	yr ^= P[17];
P                 603 drivers/isdn/mISDN/dsp_blowfish.c 	u32 *P = (u32 *)dsp->bf_p;
P                 629 drivers/isdn/mISDN/dsp_blowfish.c 		P[i] = bf_pbox[i];
P                 638 drivers/isdn/mISDN/dsp_blowfish.c 		P[i] = P[i] ^ temp;
P                 646 drivers/isdn/mISDN/dsp_blowfish.c 		encrypt_block(P, S, data, data);
P                 648 drivers/isdn/mISDN/dsp_blowfish.c 		P[i] = data[0];
P                 649 drivers/isdn/mISDN/dsp_blowfish.c 		P[i + 1] = data[1];
P                 654 drivers/isdn/mISDN/dsp_blowfish.c 			encrypt_block(P, S, data, data);
P                1770 drivers/media/dvb-frontends/stv0367.c 	u32 M, N, P;
P                1782 drivers/media/dvb-frontends/stv0367.c 		P = (u32)stv0367_readbits(state, F367CAB_PLL_PDIV);
P                1784 drivers/media/dvb-frontends/stv0367.c 		if (P > 5)
P                1785 drivers/media/dvb-frontends/stv0367.c 			P = 5;
P                1787 drivers/media/dvb-frontends/stv0367.c 		mclk_Hz = ((ExtClk_Hz / 2) * N) / (M * (1 << P));
P                2530 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_PVFTDH(P)		(0x06010 + (0x40 * (P)))
P                2531 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_PVFTDT(P)		(0x06018 + (0x40 * (P)))
P                2532 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_PVFTXDCTL(P)	(0x06028 + (0x40 * (P)))
P                2533 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_PVFTDWBAL(P)	(0x06038 + (0x40 * (P)))
P                2534 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_PVFTDWBAH(P)	(0x0603C + (0x40 * (P)))
P                3707 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_PORT_CAR_GEN_CTRL(P)	((P) ? 0x8010 : 0x4010)
P                3708 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_LINK_S1(P)		((P) ? 0x8200 : 0x4200)
P                3709 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_LINK_CTRL_1(P)	((P) ? 0x820C : 0x420C)
P                3710 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_AN_CNTL_1(P)		((P) ? 0x822C : 0x422C)
P                3711 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_AN_CNTL_8(P)		((P) ? 0x8248 : 0x4248)
P                3712 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_SGMII_CTRL(P)		((P) ? 0x82A0 : 0x42A0)
P                3713 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_LP_BASE_PAGE_HIGH(P)	((P) ? 0x836C : 0x436C)
P                3714 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_DSP_TXFFE_STATE_4(P)	((P) ? 0x8634 : 0x4634)
P                3715 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_DSP_TXFFE_STATE_5(P)	((P) ? 0x8638 : 0x4638)
P                3716 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_RX_TRN_LINKUP_CTRL(P)	((P) ? 0x8B00 : 0x4B00)
P                3717 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_PMD_DFX_BURNIN(P)	((P) ? 0x8E00 : 0x4E00)
P                3718 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_PMD_FLX_MASK_ST20(P)	((P) ? 0x9054 : 0x5054)
P                3719 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_TX_COEFF_CTRL_1(P)	((P) ? 0x9520 : 0x5520)
P                3720 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h #define IXGBE_KRM_RX_ANA_CTL(P)		((P) ? 0x9A00 : 0x5A00)
P                  30 drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c #define QLC_DCB_GET_TC_PRIO(X, P)	((X >> (P * 3)) & 0x7)
P                  31 drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c #define QLC_DCB_GET_PGID_PRIO(X, P)	((X >> (P * 8)) & 0xff)
P                  32 drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c #define QLC_DCB_GET_BWPER_PG(X, P)	((X >> (P * 8)) & 0xff)
P                  33 drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c #define QLC_DCB_GET_TSA_PG(X, P)	((X >> (P * 8)) & 0xff)
P                  34 drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c #define QLC_DCB_GET_PFC_PRIO(X, P)	(((X >> 24) >> P) & 0x1)
P                 480 drivers/net/wan/farsync.c #define port_to_dev(P)  ((P)->dev)
P                1099 drivers/net/wireless/broadcom/b43/phy_g.c #define LPD(L, P, D)	(((L) << 2) | ((P) << 1) | ((D) << 0))
P                1381 drivers/net/wireless/broadcom/b43legacy/radio.c #define LPD(L, P, D)    (((L) << 2) | ((P) << 1) | ((D) << 0))
P                  33 drivers/pinctrl/sunxi/pinctrl-sunxi.h 	PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin)
P                 734 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
P                 735 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
P                 736 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
P                 737 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
P                 738 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
P                 752 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
P                 753 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
P                 754 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
P                 755 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
P                 756 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
P                 770 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
P                 771 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
P                 772 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
P                 773 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
P                 774 drivers/regulator/max77620-regulator.c 	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
P                 408 drivers/usb/serial/iuu_phoenix.c 	unsigned int P = 0;
P                 425 drivers/usb/serial/iuu_phoenix.c 		P = 1193;
P                 430 drivers/usb/serial/iuu_phoenix.c 		P = 161;
P                 435 drivers/usb/serial/iuu_phoenix.c 		P = 66;
P                 465 drivers/usb/serial/iuu_phoenix.c 						P = lP;
P                 473 drivers/usb/serial/iuu_phoenix.c 	P2 = ((P - PO) / 2) - 4;
P                 477 drivers/usb/serial/iuu_phoenix.c 	PO = (P >> 10) & 0x01;
P                3034 drivers/video/fbdev/aty/atyfb_base.c 		unsigned int N, P, Q, M, T, R;
P                3075 drivers/video/fbdev/aty/atyfb_base.c 		P = aty_postdividers[((pll_regs[VCLK_POST_DIV] >> ((clock_cntl & 3) << 1)) & 3) |
P                3081 drivers/video/fbdev/aty/atyfb_base.c 		Q = N / P;
P                 541 drivers/video/fbdev/gbefb.c 	SET_GBE_FIELD(DOTCLK, P, val, timing->pll_p);
P                 212 drivers/video/fbdev/i810/i810.h 	u32 pixclock, M, N, P;
P                 240 drivers/video/fbdev/i810/i810_main.c 	tmp1 = par->regs.P;
P                1179 drivers/video/fbdev/i810/i810_main.c 		       &par->regs.N, &par->regs.P);
P                 245 drivers/video/fbdev/kyro/STG4000InitDevice.c 	u32 F, R, P;
P                 285 drivers/video/fbdev/kyro/STG4000InitDevice.c 	ulCoreClock = ProgramClock(REF_FREQ, CORE_PLL_FREQ, &F, &R, &P);
P                 287 drivers/video/fbdev/kyro/STG4000InitDevice.c 	core_pll |= ((P) | ((F - 2) << 2) | ((R - 2) << 11));
P                  30 drivers/video/fbdev/kyro/STG4000Ramdac.c 	u32 F = 0, R = 0, P = 0;
P                  87 drivers/video/fbdev/kyro/STG4000Ramdac.c 	*pixelClock = ProgramClock(REF_CLOCK, *pixelClock, &F, &R, &P);
P                  93 drivers/video/fbdev/kyro/STG4000Ramdac.c 	tmp |= ((P) | ((F - 2) << 2) | ((R - 2) << 11));
P                 144 drivers/video/fbdev/nvidia/nv_hw.c 	unsigned int pll, N, M, MB, NB, P;
P                 148 drivers/video/fbdev/nvidia/nv_hw.c 		P = (pll >> 16) & 0x07;
P                 160 drivers/video/fbdev/nvidia/nv_hw.c 		*MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P;
P                 163 drivers/video/fbdev/nvidia/nv_hw.c 		P = (pll >> 16) & 0x07;
P                 170 drivers/video/fbdev/nvidia/nv_hw.c 		*NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P;
P                 175 drivers/video/fbdev/nvidia/nv_hw.c 		P = (pll >> 16) & 0x0F;
P                 184 drivers/video/fbdev/nvidia/nv_hw.c 		*MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P;
P                 189 drivers/video/fbdev/nvidia/nv_hw.c 		P = (pll >> 16) & 0x0F;
P                 198 drivers/video/fbdev/nvidia/nv_hw.c 		*NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P;
P                 205 drivers/video/fbdev/nvidia/nv_hw.c 		P = (pll >> 16) & 0x07;
P                 213 drivers/video/fbdev/nvidia/nv_hw.c 		*MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P;
P                 218 drivers/video/fbdev/nvidia/nv_hw.c 		P = (pll >> 16) & 0x07;
P                 226 drivers/video/fbdev/nvidia/nv_hw.c 		*NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P;
P                 231 drivers/video/fbdev/nvidia/nv_hw.c 		P = (pll >> 16) & 0x0F;
P                 232 drivers/video/fbdev/nvidia/nv_hw.c 		*MClk = (N * par->CrystalFreqKHz / M) >> P;
P                 237 drivers/video/fbdev/nvidia/nv_hw.c 		P = (pll >> 16) & 0x0F;
P                 238 drivers/video/fbdev/nvidia/nv_hw.c 		*NVClk = (N * par->CrystalFreqKHz / M) >> P;
P                 684 drivers/video/fbdev/nvidia/nv_hw.c 	unsigned int M, N, P, pll, MClk, NVClk, memctrl;
P                 706 drivers/video/fbdev/nvidia/nv_hw.c 	P = (pll >> 16) & 0x0F;
P                 707 drivers/video/fbdev/nvidia/nv_hw.c 	NVClk = (N * par->CrystalFreqKHz / M) >> P;
P                 772 drivers/video/fbdev/nvidia/nv_hw.c 	unsigned M, N, P;
P                 786 drivers/video/fbdev/nvidia/nv_hw.c 	for (P = 0; P <= 4; P++) {
P                 787 drivers/video/fbdev/nvidia/nv_hw.c 		Freq = VClk << P;
P                 790 drivers/video/fbdev/nvidia/nv_hw.c 				N = ((VClk << P) * M) / par->CrystalFreqKHz;
P                 794 drivers/video/fbdev/nvidia/nv_hw.c 					     M) >> P;
P                 801 drivers/video/fbdev/nvidia/nv_hw.c 						    (P << 16) | (N << 8) | M;
P                 818 drivers/video/fbdev/nvidia/nv_hw.c 	unsigned M, N, P;
P                 826 drivers/video/fbdev/nvidia/nv_hw.c 	for (P = 0; P <= 6; P++) {
P                 827 drivers/video/fbdev/nvidia/nv_hw.c 		Freq = VClk << P;
P                 830 drivers/video/fbdev/nvidia/nv_hw.c 				N = ((VClk << P) * M) /
P                 835 drivers/video/fbdev/nvidia/nv_hw.c 					     M) >> P;
P                 842 drivers/video/fbdev/nvidia/nv_hw.c 						    (P << 16) | (N << 8) | M;
P                 619 drivers/video/fbdev/riva/riva_hw.c     unsigned int M, N, P, pll, MClk;
P                 622 drivers/video/fbdev/riva/riva_hw.c     M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
P                 623 drivers/video/fbdev/riva/riva_hw.c     MClk = (N * chip->CrystalFreqKHz / M) >> P;
P                 808 drivers/video/fbdev/riva/riva_hw.c     unsigned int M, N, P, pll, MClk, NVClk, cfg1;
P                 811 drivers/video/fbdev/riva/riva_hw.c     M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
P                 812 drivers/video/fbdev/riva/riva_hw.c     MClk  = (N * chip->CrystalFreqKHz / M) >> P;
P                 814 drivers/video/fbdev/riva/riva_hw.c     M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
P                 815 drivers/video/fbdev/riva/riva_hw.c     NVClk  = (N * chip->CrystalFreqKHz / M) >> P;
P                1071 drivers/video/fbdev/riva/riva_hw.c     unsigned int M, N, P, pll, MClk, NVClk, cfg1;
P                1074 drivers/video/fbdev/riva/riva_hw.c     M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
P                1075 drivers/video/fbdev/riva/riva_hw.c     MClk  = (N * chip->CrystalFreqKHz / M) >> P;
P                1077 drivers/video/fbdev/riva/riva_hw.c     M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
P                1078 drivers/video/fbdev/riva/riva_hw.c     NVClk  = (N * chip->CrystalFreqKHz / M) >> P;
P                1117 drivers/video/fbdev/riva/riva_hw.c     unsigned int M, N, P, pll, MClk, NVClk;
P                1131 drivers/video/fbdev/riva/riva_hw.c     M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
P                1132 drivers/video/fbdev/riva/riva_hw.c     NVClk  = (N * chip->CrystalFreqKHz / M) >> P;
P                1183 drivers/video/fbdev/riva/riva_hw.c     unsigned M, N, P;
P                1201 drivers/video/fbdev/riva/riva_hw.c     for (P = 0; P <= highP; P ++)
P                1203 drivers/video/fbdev/riva/riva_hw.c         Freq = VClk << P;
P                1208 drivers/video/fbdev/riva/riva_hw.c                 N    = (VClk << P) * M / chip->CrystalFreqKHz;
P                1210 drivers/video/fbdev/riva/riva_hw.c                 Freq = (chip->CrystalFreqKHz * N / M) >> P;
P                1219 drivers/video/fbdev/riva/riva_hw.c                     *pOut     = P;
P                  54 fs/jfs/jfs_btree.h #define BT_GETPAGE(IP, BN, MP, TYPE, SIZE, P, RC, ROOT)\
P                  59 fs/jfs/jfs_btree.h 		P = (TYPE *)&JFS_IP(IP)->ROOT;\
P                  67 fs/jfs/jfs_btree.h 			P = (MP)->data;\
P                  69 fs/jfs/jfs_btree.h 			P = NULL;\
P                 142 fs/jfs/jfs_btree.h #define BT_GETSEARCH(IP, LEAF, BN, MP, TYPE, P, INDEX, ROOT)\
P                 147 fs/jfs/jfs_btree.h 		P = (TYPE *)MP->data;\
P                 149 fs/jfs/jfs_btree.h 		P = (TYPE *)&JFS_IP(IP)->ROOT;\
P                 114 fs/jfs/jfs_dtree.c #define DT_GETPAGE(IP, BN, MP, SIZE, P, RC)				\
P                 116 fs/jfs/jfs_dtree.c 	BT_GETPAGE(IP, BN, MP, dtpage_t, SIZE, P, RC, i_dtroot);	\
P                 118 fs/jfs/jfs_dtree.c 		if (((P)->header.nextindex >				\
P                 119 fs/jfs/jfs_dtree.c 		     (((BN) == 0) ? DTROOTMAXSLOT : (P)->header.maxslot)) || \
P                 120 fs/jfs/jfs_dtree.c 		    ((BN) && ((P)->header.maxslot > DTPAGEMAXSLOT))) {	\
P                 133 fs/jfs/jfs_dtree.c #define DT_GETSEARCH(IP, LEAF, BN, MP, P, INDEX) \
P                 134 fs/jfs/jfs_dtree.c 	BT_GETSEARCH(IP, LEAF, BN, MP, dtpage_t, P, INDEX, i_dtroot)
P                  54 fs/jfs/jfs_xtree.c #define XT_GETPAGE(IP, BN, MP, SIZE, P, RC)				\
P                  56 fs/jfs/jfs_xtree.c 	BT_GETPAGE(IP, BN, MP, xtpage_t, SIZE, P, RC, i_xtroot);	\
P                  58 fs/jfs/jfs_xtree.c 		if ((le16_to_cpu((P)->header.nextindex) < XTENTRYSTART) || \
P                  59 fs/jfs/jfs_xtree.c 		    (le16_to_cpu((P)->header.nextindex) >		\
P                  60 fs/jfs/jfs_xtree.c 		     le16_to_cpu((P)->header.maxentry)) ||		\
P                  61 fs/jfs/jfs_xtree.c 		    (le16_to_cpu((P)->header.maxentry) >		\
P                  75 fs/jfs/jfs_xtree.c #define XT_GETSEARCH(IP, LEAF, BN, MP, P, INDEX) \
P                  76 fs/jfs/jfs_xtree.c 	BT_GETSEARCH(IP, LEAF, BN, MP, xtpage_t, P, INDEX, i_xtroot)
P                 404 kernel/sched/debug.c 	P(se->load.weight);
P                 405 kernel/sched/debug.c 	P(se->runnable_weight);
P                 407 kernel/sched/debug.c 	P(se->avg.load_avg);
P                 408 kernel/sched/debug.c 	P(se->avg.util_avg);
P                 409 kernel/sched/debug.c 	P(se->avg.runnable_load_avg);
P                 582 kernel/sched/debug.c 	P(rt_throttled);
P                 641 kernel/sched/debug.c 	P(nr_running);
P                 642 kernel/sched/debug.c 	P(nr_switches);
P                 643 kernel/sched/debug.c 	P(nr_load_updates);
P                 644 kernel/sched/debug.c 	P(nr_uninterruptible);
P                 661 kernel/sched/debug.c 		P(yld_count);
P                 662 kernel/sched/debug.c 		P(sched_count);
P                 663 kernel/sched/debug.c 		P(sched_goidle);
P                 664 kernel/sched/debug.c 		P(ttwu_count);
P                 665 kernel/sched/debug.c 		P(ttwu_local);
P                 708 kernel/sched/debug.c 	P(jiffies);
P                 710 kernel/sched/debug.c 	P(sched_clock_stable());
P                 725 kernel/sched/debug.c 	P(sysctl_sched_child_runs_first);
P                 726 kernel/sched/debug.c 	P(sysctl_sched_features);
P                 837 kernel/sched/debug.c 		P(mm->numa_scan_seq);
P                 846 kernel/sched/debug.c 	P(numa_pages_migrated);
P                 847 kernel/sched/debug.c 	P(numa_preferred_nid);
P                 848 kernel/sched/debug.c 	P(total_numa_faults);
P                 885 kernel/sched/debug.c 	P(se.nr_migrations);
P                 942 kernel/sched/debug.c 	P(se.load.weight);
P                 943 kernel/sched/debug.c 	P(se.runnable_weight);
P                 945 kernel/sched/debug.c 	P(se.avg.load_sum);
P                 946 kernel/sched/debug.c 	P(se.avg.runnable_load_sum);
P                 947 kernel/sched/debug.c 	P(se.avg.util_sum);
P                 948 kernel/sched/debug.c 	P(se.avg.load_avg);
P                 949 kernel/sched/debug.c 	P(se.avg.runnable_load_avg);
P                 950 kernel/sched/debug.c 	P(se.avg.util_avg);
P                 951 kernel/sched/debug.c 	P(se.avg.last_update_time);
P                 952 kernel/sched/debug.c 	P(se.avg.util_est.ewma);
P                 953 kernel/sched/debug.c 	P(se.avg.util_est.enqueued);
P                 955 kernel/sched/debug.c 	P(policy);
P                 956 kernel/sched/debug.c 	P(prio);
P                 958 kernel/sched/debug.c 		P(dl.runtime);
P                 959 kernel/sched/debug.c 		P(dl.deadline);
P                 149 kernel/time/timer_list.c 	P(hres_active);
P                 150 kernel/time/timer_list.c 	P(nr_events);
P                 151 kernel/time/timer_list.c 	P(nr_retries);
P                 152 kernel/time/timer_list.c 	P(nr_hangs);
P                 153 kernel/time/timer_list.c 	P(max_hang_time);
P                 167 kernel/time/timer_list.c 		P(nohz_mode);
P                 169 kernel/time/timer_list.c 		P(tick_stopped);
P                 170 kernel/time/timer_list.c 		P(idle_jiffies);
P                 171 kernel/time/timer_list.c 		P(idle_calls);
P                 172 kernel/time/timer_list.c 		P(idle_sleeps);
P                 178 kernel/time/timer_list.c 		P(last_jiffies);
P                 179 kernel/time/timer_list.c 		P(next_timer);
P                 121 mm/percpu-stats.c 	P("nr_alloc", chunk->nr_alloc);
P                 122 mm/percpu-stats.c 	P("max_alloc_size", chunk->max_alloc_size);
P                 123 mm/percpu-stats.c 	P("empty_pop_pages", chunk->nr_empty_pop_pages);
P                 124 mm/percpu-stats.c 	P("first_bit", chunk_md->first_free);
P                 125 mm/percpu-stats.c 	P("free_bytes", chunk->free_bytes);
P                 126 mm/percpu-stats.c 	P("contig_bytes", chunk_md->contig_hint * PCPU_MIN_ALLOC_SIZE);
P                 127 mm/percpu-stats.c 	P("sum_frag", sum_frag);
P                 128 mm/percpu-stats.c 	P("max_frag", max_frag);
P                 129 mm/percpu-stats.c 	P("cur_min_alloc", cur_min_alloc);
P                 130 mm/percpu-stats.c 	P("cur_med_alloc", cur_med_alloc);
P                 131 mm/percpu-stats.c 	P("cur_max_alloc", cur_max_alloc);
P                 191 mm/percpu-stats.c 	P("empty_pop_pages", pcpu_nr_empty_pop_pages);
P                2067 net/core/dev.c #define xmap_dereference(P)		\
P                2068 net/core/dev.c 	rcu_dereference_protected((P), lockdep_is_held(&xps_map_mutex))
P                  14 samples/bpf/offwaketime_kern.c #define _(P) ({typeof(P) val; bpf_probe_read(&val, sizeof(val), &P); val;})
P                  12 samples/bpf/test_overhead_kprobe_kern.c #define _(P) ({typeof(P) val = 0; bpf_probe_read(&val, sizeof(val), &P); val;})
P                  13 samples/bpf/tracex1_kern.c #define _(P) ({typeof(P) val = 0; bpf_probe_read(&val, sizeof(val), &P); val;})
P                 199 scripts/gcc-plugins/gcc-common.h #define FOR_EACH_VEC_ELT(T, V, I, P) \
P                 200 scripts/gcc-plugins/gcc-common.h 	for (I = 0; VEC_iterate(T, (V), (I), (P)); ++(I))
P                 929 scripts/gcc-plugins/gcc-common.h #define ipa_ref_list_referring_iterate(L, I, P)	\
P                 930 scripts/gcc-plugins/gcc-common.h 	(L)->referring.iterate((I), &(P))
P                 931 scripts/gcc-plugins/gcc-common.h #define ipa_ref_list_reference_iterate(L, I, P)	\
P                 932 scripts/gcc-plugins/gcc-common.h 	(L)->reference.iterate((I), &(P))
P                 157 security/apparmor/include/label.h #define label_for_each(I, L, P)						\
P                 158 security/apparmor/include/label.h 	for ((I).i = 0; ((P) = (L)->vec[(I).i]); ++((I).i))
P                 161 security/apparmor/include/label.h #define label_for_each_cont(I, L, P)					\
P                 162 security/apparmor/include/label.h 	for (++((I).i); ((P) = (L)->vec[(I).i]); ++((I).i))
P                 191 security/apparmor/include/label.h #define label_for_each_confined(I, L, P)				\
P                 193 security/apparmor/include/label.h 	     ((P) = (L)->vec[(I).i]);					\
P                 196 security/apparmor/include/label.h #define label_for_each_in_merge(I, A, B, P)				\
P                 198 security/apparmor/include/label.h 	     ((P) = aa_label_next_in_merge(&(I), (A), (B)));		\
P                 201 security/apparmor/include/label.h #define label_for_each_not_in_set(I, SET, SUB, P)			\
P                 203 security/apparmor/include/label.h 	     ((P) = __aa_label_next_not_in_set(&(I), (SET), (SUB)));	\
P                 214 security/apparmor/include/label.h #define label_for_each_in_ns(I, NS, L, P)				\
P                 216 security/apparmor/include/label.h 	     ((P) = (L)->vec[(I).i]);					\
P                 219 security/apparmor/include/label.h #define fn_for_each_in_ns(L, P, FN)					\
P                 224 security/apparmor/include/label.h 	label_for_each_in_ns(__i, __ns, (L), (P)) {			\
P                 231 security/apparmor/include/label.h #define fn_for_each_XXX(L, P, FN, ...)					\
P                 235 security/apparmor/include/label.h 	label_for_each ## __VA_ARGS__(i, (L), (P)) {			\
P                 241 security/apparmor/include/label.h #define fn_for_each(L, P, FN) fn_for_each_XXX(L, P, FN)
P                 242 security/apparmor/include/label.h #define fn_for_each_confined(L, P, FN) fn_for_each_XXX(L, P, FN, _confined)
P                 244 security/apparmor/include/label.h #define fn_for_each2_XXX(L1, L2, P, FN, ...)				\
P                 248 security/apparmor/include/label.h 	label_for_each ## __VA_ARGS__(i, (L1), (L2), (P)) {		\
P                 254 security/apparmor/include/label.h #define fn_for_each_in_merge(L1, L2, P, FN)				\
P                 255 security/apparmor/include/label.h 	fn_for_each2_XXX((L1), (L2), P, FN, _in_merge)
P                 256 security/apparmor/include/label.h #define fn_for_each_not_in_set(L1, L2, P, FN)				\
P                 257 security/apparmor/include/label.h 	fn_for_each2_XXX((L1), (L2), P, FN, _not_in_set)
P                 217 security/apparmor/include/lib.h #define fn_label_build(L, P, GFP, FN)					\
P                 233 security/apparmor/include/lib.h 		label_for_each(__i, (L), (P)) {				\
P                 244 security/apparmor/include/lib.h 				label_for_each(__i, __lvec[__j], (P))	\
P                 245 security/apparmor/include/lib.h 					__pvec[__k++] = aa_get_profile(P); \
P                 262 security/apparmor/include/lib.h 		(P) = labels_profile(L);				\
P                 272 security/apparmor/include/lib.h #define __fn_build_in_ns(NS, P, NS_FN, OTHER_FN)			\
P                 275 security/apparmor/include/lib.h 	if ((P)->ns != (NS))						\
P                 282 security/apparmor/include/lib.h #define fn_label_build_in_ns(L, P, GFP, NS_FN, OTHER_FN)		\
P                 284 security/apparmor/include/lib.h 	fn_label_build((L), (P), (GFP),					\
P                 285 security/apparmor/include/lib.h 		__fn_build_in_ns(labels_ns(L), (P), (NS_FN), (OTHER_FN))); \
P                  56 security/apparmor/include/net.h #define DEFINE_AUDIT_NET(NAME, OP, SK, F, T, P)				  \
P                  65 security/apparmor/include/net.h 	aad(&NAME)->net.protocol = (P)
P                 115 security/apparmor/include/perms.h #define xcheck_ns_profile_label(P, L, FN, args...)		\
P                 119 security/apparmor/include/perms.h 		    xcheck_ns_profile_profile((P), __p2, (FN), args));	\
P                 132 security/apparmor/include/perms.h #define xcheck_labels(L1, L2, P, FN1, FN2)			\
P                 133 security/apparmor/include/perms.h 	xcheck(fn_for_each((L1), (P), (FN1)), fn_for_each((L2), (P), (FN2)))
P                 171 security/apparmor/include/policy.h #define profiles_ns(P) ((P)->ns)
P                 651 security/security.c 		struct security_hook_list *P;			\
P                 653 security/security.c 		hlist_for_each_entry(P, &security_hook_heads.FUNC, list) \
P                 654 security/security.c 			P->hook.FUNC(__VA_ARGS__);		\
P                 660 security/security.c 		struct security_hook_list *P;			\
P                 662 security/security.c 		hlist_for_each_entry(P, &security_hook_heads.FUNC, list) { \
P                 663 security/security.c 			RC = P->hook.FUNC(__VA_ARGS__);		\
P                 754 sound/soc/codecs/pcm512x.c 	int R, J, D, P;
P                 772 sound/soc/codecs/pcm512x.c 	P = den;
P                 774 sound/soc/codecs/pcm512x.c 	    && 1000000 <= pllin_rate / P && pllin_rate / P <= 20000000) {
P                 785 sound/soc/codecs/pcm512x.c 			dev_dbg(dev, "R * J / P = %d * %d / %d\n", R, J, P);
P                 803 sound/soc/codecs/pcm512x.c 	for (P = den; P <= 15; P++) {
P                 804 sound/soc/codecs/pcm512x.c 		if (pllin_rate / P < 6667000 || 200000000 < pllin_rate / P)
P                 806 sound/soc/codecs/pcm512x.c 		if (num * P % den)
P                 808 sound/soc/codecs/pcm512x.c 		K = num * P / den;
P                 815 sound/soc/codecs/pcm512x.c 		dev_dbg(dev, "J.D / P = %d.%04d / %d\n", J, D, P);
P                 824 sound/soc/codecs/pcm512x.c 	P = DIV_ROUND_UP(pllin_rate, 20000000);
P                 825 sound/soc/codecs/pcm512x.c 	if (!P)
P                 826 sound/soc/codecs/pcm512x.c 		P = 1;
P                 827 sound/soc/codecs/pcm512x.c 	else if (P > 15) {
P                 831 sound/soc/codecs/pcm512x.c 	if (pllin_rate / P < 6667000) {
P                 835 sound/soc/codecs/pcm512x.c 	K = DIV_ROUND_CLOSEST_ULL(10000ULL * pll_rate * P, pllin_rate);
P                 843 sound/soc/codecs/pcm512x.c 	dev_dbg(dev, "J.D / P ~ %d.%04d / %d\n", J, D, P);
P                 844 sound/soc/codecs/pcm512x.c 	pcm512x->real_pll = DIV_ROUND_DOWN_ULL((u64)K * pllin_rate, 10000 * P);
P                 850 sound/soc/codecs/pcm512x.c 	pcm512x->pll_p = P;
P                 337 tools/perf/util/mem-events.c 	if (lock & P(LOCK, LOCKED)) stats->locks++;
P                 339 tools/perf/util/mem-events.c 	if (op & P(OP, LOAD)) {
P                 348 tools/perf/util/mem-events.c 		if (lvl & P(LVL, HIT)) {
P                 349 tools/perf/util/mem-events.c 			if (lvl & P(LVL, UNC)) stats->ld_uncache++;
P                 350 tools/perf/util/mem-events.c 			if (lvl & P(LVL, IO))  stats->ld_io++;
P                 351 tools/perf/util/mem-events.c 			if (lvl & P(LVL, LFB)) stats->ld_fbhit++;
P                 352 tools/perf/util/mem-events.c 			if (lvl & P(LVL, L1 )) stats->ld_l1hit++;
P                 353 tools/perf/util/mem-events.c 			if (lvl & P(LVL, L2 )) stats->ld_l2hit++;
P                 354 tools/perf/util/mem-events.c 			if (lvl & P(LVL, L3 )) {
P                 355 tools/perf/util/mem-events.c 				if (snoop & P(SNOOP, HITM))
P                 361 tools/perf/util/mem-events.c 			if (lvl & P(LVL, LOC_RAM)) {
P                 363 tools/perf/util/mem-events.c 				if (snoop & P(SNOOP, HIT))
P                 369 tools/perf/util/mem-events.c 			if ((lvl & P(LVL, REM_RAM1)) ||
P                 370 tools/perf/util/mem-events.c 			    (lvl & P(LVL, REM_RAM2)) ||
P                 373 tools/perf/util/mem-events.c 				if (snoop & P(SNOOP, HIT))
P                 380 tools/perf/util/mem-events.c 		if ((lvl & P(LVL, REM_CCE1)) ||
P                 381 tools/perf/util/mem-events.c 		    (lvl & P(LVL, REM_CCE2)) ||
P                 383 tools/perf/util/mem-events.c 			if (snoop & P(SNOOP, HIT))
P                 385 tools/perf/util/mem-events.c 			else if (snoop & P(SNOOP, HITM))
P                 389 tools/perf/util/mem-events.c 		if ((lvl & P(LVL, MISS)))
P                 392 tools/perf/util/mem-events.c 	} else if (op & P(OP, STORE)) {
P                 401 tools/perf/util/mem-events.c 		if (lvl & P(LVL, HIT)) {
P                 402 tools/perf/util/mem-events.c 			if (lvl & P(LVL, UNC)) stats->st_uncache++;
P                 403 tools/perf/util/mem-events.c 			if (lvl & P(LVL, L1 )) stats->st_l1hit++;
P                 405 tools/perf/util/mem-events.c 		if (lvl & P(LVL, MISS))
P                 406 tools/perf/util/mem-events.c 			if (lvl & P(LVL, L1)) stats->st_l1miss++;
P                  22 tools/perf/util/s390-cpumsf-kernel.h 	unsigned int P:1;	    /* 28 PSW Problem state		 */
P                 257 tools/perf/util/s390-cpumsf.c 	local.P = word >> 35 & 0x1;
P                 276 tools/perf/util/s390-cpumsf.c 		      basic->P ? 'P' : ' ',
P                 518 tools/perf/util/s390-cpumsf.c 		sample.cpumode = basic->P ? PERF_RECORD_MISC_USER
P                 521 tools/perf/util/s390-cpumsf.c 		sample.cpumode = basic->P ? PERF_RECORD_MISC_GUEST_USER
P                 525 tools/perf/util/s390-cpumsf.c 		sample.cpumode = basic->P ? PERF_RECORD_MISC_GUEST_USER
P                 528 tools/perf/util/s390-cpumsf.c 		sample.cpumode = basic->P ? PERF_RECORD_MISC_USER
P                 536 tools/perf/util/s390-cpumsf.c 		 __func__, pos, sample.ip, basic->P, basic->CL, sample.pid,
P                  41 tools/testing/selftests/bpf/progs/test_tcp_estats.c #define _(P) ({typeof(P) val = 0; bpf_probe_read(&val, sizeof(val), &P); val;})