Op0               317 arch/arm64/kvm/sys_regs.c 	u32 sr = sys_reg((u32)r->Op0, (u32)r->Op1,
Op0               982 arch/arm64/kvm/sys_regs.c 	sys_reg((u32)(x)->Op0, (u32)(x)->Op1,				\
Op0              1077 arch/arm64/kvm/sys_regs.c 	u32 id = sys_reg((u32)r->Op0, (u32)r->Op1,
Op0              1338 arch/arm64/kvm/sys_regs.c 	Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2),	\
Op0              2134 arch/arm64/kvm/sys_regs.c 	params.Op0 = 0;
Op0              2191 arch/arm64/kvm/sys_regs.c 	params.Op0 = 0;
Op0              2298 arch/arm64/kvm/sys_regs.c 	params.Op0 = (esr >> 20) & 3;
Op0              2330 arch/arm64/kvm/sys_regs.c 		params->Op0 = ((id & KVM_REG_ARM64_SYSREG_OP0_MASK)
Op0              2631 arch/arm64/kvm/sys_regs.c 		(reg->Op0 << KVM_REG_ARM64_SYSREG_OP0_SHIFT) |
Op0                15 arch/arm64/kvm/sys_regs.h 	u8	Op0;
Op0                31 arch/arm64/kvm/sys_regs.h 	u8	Op0;
Op0                69 arch/arm64/kvm/sys_regs.h 		      p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read");
Op0               127 arch/arm64/kvm/sys_regs.h 	if (i1->Op0 != i2->Op0)
Op0               128 arch/arm64/kvm/sys_regs.h 		return i1->Op0 - i2->Op0;
Op0               143 arch/arm64/kvm/sys_regs.h #define Op0(_x) 	.Op0 = _x
Op0               151 arch/arm64/kvm/sys_regs.h 	Op0(sys_reg_Op0(reg)), Op1(sys_reg_Op1(reg)),	\
Op0               164 arch/arm64/kvm/trace.h 		__field(u8,				Op0)
Op0               175 arch/arm64/kvm/trace.h 		__entry->Op0 = reg->Op0;
Op0               176 arch/arm64/kvm/trace.h 		__entry->Op0 = reg->Op0;
Op0               185 arch/arm64/kvm/trace.h 		  __entry->Op0, __entry->Op1, __entry->CRn,