OWL_CPU1_ADDR      67 arch/arm/mach-actions/platsmp.c 	       timer_base_addr + OWL_CPU1_ADDR + (cpu - 1) * 4);
OWL_CPU1_ADDR      89 arch/arm/mach-actions/platsmp.c 	writel(0, timer_base_addr + OWL_CPU1_ADDR + (cpu - 1) * 4);