OUT_RING          470 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(GFX_OP_COLOR_FACTOR);
OUT_RING          471 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_CTXREG_CF1]);
OUT_RING          473 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(GFX_OP_STIPPLE);
OUT_RING          474 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_CTXREG_ST1]);
OUT_RING          481 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(tmp);
OUT_RING          488 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(0);
OUT_RING          502 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(GFX_OP_MAP_INFO);
OUT_RING          503 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_TEXREG_MI1]);
OUT_RING          504 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_TEXREG_MI2]);
OUT_RING          505 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_TEXREG_MI3]);
OUT_RING          512 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(tmp);
OUT_RING          519 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(0);
OUT_RING          537 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(CMD_OP_DESTBUFFER_INFO);
OUT_RING          538 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(tmp);
OUT_RING          545 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(CMD_OP_Z_BUFFER_INFO);
OUT_RING          546 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(dev_priv->zi1);
OUT_RING          548 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(GFX_OP_DESTBUFFER_VARS);
OUT_RING          549 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_DESTREG_DV1]);
OUT_RING          551 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(GFX_OP_DRAWRECT_INFO);
OUT_RING          552 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_DESTREG_DR1]);
OUT_RING          553 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_DESTREG_DR2]);
OUT_RING          554 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_DESTREG_DR3]);
OUT_RING          555 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(code[I810_DESTREG_DR4]);
OUT_RING          556 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING          634 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
OUT_RING          635 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
OUT_RING          636 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING((height << 16) | width);
OUT_RING          637 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(start);
OUT_RING          638 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(clear_color);
OUT_RING          639 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(0);
OUT_RING          645 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
OUT_RING          646 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
OUT_RING          647 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING((height << 16) | width);
OUT_RING          648 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(dev_priv->back_offset + start);
OUT_RING          649 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(clear_color);
OUT_RING          650 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(0);
OUT_RING          656 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
OUT_RING          657 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
OUT_RING          658 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING((height << 16) | width);
OUT_RING          659 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(dev_priv->depth_offset + start);
OUT_RING          660 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(clear_zval);
OUT_RING          661 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(0);
OUT_RING          697 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
OUT_RING          698 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(pitch | (0xCC << 16));
OUT_RING          699 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING((h << 16) | (w * cpp));
OUT_RING          701 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(dev_priv->front_offset + start);
OUT_RING          703 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(dev_priv->back_offset + start);
OUT_RING          704 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(pitch);
OUT_RING          706 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(dev_priv->back_offset + start);
OUT_RING          708 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(dev_priv->front_offset + start);
OUT_RING          755 drivers/gpu/drm/i810/i810_dma.c 				OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
OUT_RING          757 drivers/gpu/drm/i810/i810_dma.c 				OUT_RING(GFX_OP_SCISSOR_INFO);
OUT_RING          758 drivers/gpu/drm/i810/i810_dma.c 				OUT_RING(box[i].x1 | (box[i].y1 << 16));
OUT_RING          759 drivers/gpu/drm/i810/i810_dma.c 				OUT_RING((box[i].x2 -
OUT_RING          765 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(CMD_OP_BATCH_BUFFER);
OUT_RING          766 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(start | BB1_PROTECTED);
OUT_RING          767 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(start + used - 4);
OUT_RING          768 drivers/gpu/drm/i810/i810_dma.c 			OUT_RING(0);
OUT_RING          781 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(CMD_STORE_DWORD_IDX);
OUT_RING          782 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(20);
OUT_RING          783 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(dev_priv->counter);
OUT_RING          784 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(CMD_STORE_DWORD_IDX);
OUT_RING          785 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(buf_priv->my_use_idx);
OUT_RING          786 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(I810_BUF_FREE);
OUT_RING          787 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(CMD_REPORT_HEAD);
OUT_RING          788 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(0);
OUT_RING          806 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
OUT_RING          807 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING          815 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
OUT_RING          817 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(dev_priv->back_offset);
OUT_RING          820 drivers/gpu/drm/i810/i810_dma.c 		OUT_RING(dev_priv->front_offset);
OUT_RING          823 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING          827 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
OUT_RING          828 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING          847 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
OUT_RING          848 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(CMD_REPORT_HEAD);
OUT_RING          849 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING          850 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING          866 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(CMD_REPORT_HEAD);
OUT_RING          867 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING         1073 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(CMD_OP_BATCH_BUFFER);
OUT_RING         1074 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(start | BB1_PROTECTED);
OUT_RING         1075 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(start + used - 4);
OUT_RING         1076 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING         1080 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(CMD_STORE_DWORD_IDX);
OUT_RING         1081 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(buf_priv->my_use_idx);
OUT_RING         1082 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(I810_BUF_FREE);
OUT_RING         1083 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING         1085 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(CMD_STORE_DWORD_IDX);
OUT_RING         1086 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(16);
OUT_RING         1087 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(last_render);
OUT_RING         1088 drivers/gpu/drm/i810/i810_dma.c 	OUT_RING(0);
OUT_RING           20 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x000003ff);
OUT_RING           22 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           24 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           26 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, REG_A2XX_RB_SURFACE_INFO - 0x2000);
OUT_RING           27 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, REG_A2XX_PA_SC_WINDOW_OFFSET - 0x2000);
OUT_RING           28 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, REG_A2XX_VGT_MAX_VTX_INDX - 0x2000);
OUT_RING           29 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, REG_A2XX_SQ_PROGRAM_CNTL - 0x2000);
OUT_RING           30 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, REG_A2XX_RB_DEPTHCONTROL - 0x2000);
OUT_RING           31 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, REG_A2XX_PA_SU_POINT_SIZE - 0x2000);
OUT_RING           32 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, REG_A2XX_PA_SC_LINE_CNTL - 0x2000);
OUT_RING           33 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, REG_A2XX_PA_SU_POLY_OFFSET_FRONT_SCALE - 0x2000);
OUT_RING           37 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x80000180);
OUT_RING           39 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x00000001);
OUT_RING           42 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           44 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           46 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x200001f2);
OUT_RING           48 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           50 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           54 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	OUT_RING(ring, 1);
OUT_RING           40 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x000003f7);
OUT_RING           41 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           42 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           43 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           44 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000080);
OUT_RING           45 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000100);
OUT_RING           46 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000180);
OUT_RING           47 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00006600);
OUT_RING           48 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000150);
OUT_RING           49 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x0000014e);
OUT_RING           50 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000154);
OUT_RING           51 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000001);
OUT_RING           52 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           53 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           54 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           55 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           56 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          114 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x000003f7);
OUT_RING          115 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          116 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          117 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          118 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000080);
OUT_RING          119 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000100);
OUT_RING          120 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000180);
OUT_RING          121 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00006600);
OUT_RING          122 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000150);
OUT_RING          123 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x0000014e);
OUT_RING          124 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000154);
OUT_RING          125 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000001);
OUT_RING          126 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          127 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          128 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          129 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          130 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING           85 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 				OUT_RING(ring, ptr[i]);
OUT_RING          122 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x02);
OUT_RING          126 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0);
OUT_RING          130 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));
OUT_RING          131 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));
OUT_RING          135 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 1);
OUT_RING          139 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x02);
OUT_RING          143 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x02);
OUT_RING          156 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));
OUT_RING          157 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			OUT_RING(ring, upper_32_bits(submit->cmd[i].iova));
OUT_RING          158 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			OUT_RING(ring, submit->cmd[i].size);
OUT_RING          170 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0);
OUT_RING          171 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0);
OUT_RING          172 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0);
OUT_RING          173 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0);
OUT_RING          174 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0);
OUT_RING          178 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x01);
OUT_RING          182 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, submit->seqno);
OUT_RING          189 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, CACHE_FLUSH_TS | (1 << 31));
OUT_RING          190 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));
OUT_RING          191 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));
OUT_RING          192 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, submit->seqno);
OUT_RING          201 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00);
OUT_RING          202 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00);
OUT_RING          204 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x01);
OUT_RING          206 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x01);
OUT_RING          337 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x0000002F);
OUT_RING          340 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00000003);
OUT_RING          343 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x20000000);
OUT_RING          346 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          347 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          355 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		OUT_RING(ring, 0x0000000B);
OUT_RING          358 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		OUT_RING(ring, 0x00000000);
OUT_RING          361 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          362 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          379 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0);
OUT_RING          383 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[ring->id]));
OUT_RING          384 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[ring->id]));
OUT_RING          388 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 1);
OUT_RING          391 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00);
OUT_RING          394 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x01);
OUT_RING          397 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x01);
OUT_RING          401 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00);
OUT_RING          402 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x00);
OUT_RING          403 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x01);
OUT_RING          404 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, 0x01);
OUT_RING          707 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		OUT_RING(gpu->rb[0], 0x0F);
OUT_RING          724 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		OUT_RING(gpu->rb[0], 0x00000000);
OUT_RING          231 drivers/gpu/drm/msm/adreno/a5xx_power.c 	OUT_RING(ring, 0);
OUT_RING          235 drivers/gpu/drm/msm/adreno/a5xx_power.c 	OUT_RING(ring, lower_32_bits(a5xx_gpu->gpmu_iova));
OUT_RING          236 drivers/gpu/drm/msm/adreno/a5xx_power.c 	OUT_RING(ring, upper_32_bits(a5xx_gpu->gpmu_iova));
OUT_RING          237 drivers/gpu/drm/msm/adreno/a5xx_power.c 	OUT_RING(ring, a5xx_gpu->gpmu_dwords);
OUT_RING          241 drivers/gpu/drm/msm/adreno/a5xx_power.c 	OUT_RING(ring, 1);
OUT_RING           77 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, counter | (1 << 30) | (2 << 18));
OUT_RING           78 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, lower_32_bits(iova));
OUT_RING           79 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, upper_32_bits(iova));
OUT_RING          105 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, PC_CCU_INVALIDATE_DEPTH);
OUT_RING          108 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
OUT_RING          121 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 			OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));
OUT_RING          122 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 			OUT_RING(ring, upper_32_bits(submit->cmd[i].iova));
OUT_RING          123 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 			OUT_RING(ring, submit->cmd[i].size);
OUT_RING          135 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, submit->seqno);
OUT_RING          142 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, CACHE_FLUSH_TS | (1 << 31));
OUT_RING          143 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));
OUT_RING          144 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));
OUT_RING          145 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, submit->seqno);
OUT_RING          298 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, 0x0000002f);
OUT_RING          301 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, 0x00000003);
OUT_RING          304 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, 0x20000000);
OUT_RING          307 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          308 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          311 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          314 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          315 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          535 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 		OUT_RING(gpu->rb[0], 0x00000000);
OUT_RING          435 drivers/gpu/drm/msm/adreno/adreno_gpu.c 			OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));
OUT_RING          436 drivers/gpu/drm/msm/adreno/adreno_gpu.c 			OUT_RING(ring, submit->cmd[i].size);
OUT_RING          443 drivers/gpu/drm/msm/adreno/adreno_gpu.c 	OUT_RING(ring, submit->seqno);
OUT_RING          451 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, HLSQ_FLUSH);
OUT_RING          456 drivers/gpu/drm/msm/adreno/adreno_gpu.c 	OUT_RING(ring, 0x00000000);
OUT_RING          461 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, CACHE_FLUSH_TS | BIT(31));
OUT_RING          462 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, rbmemptr(ring, fence));
OUT_RING          463 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, submit->seqno);
OUT_RING          467 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, CACHE_FLUSH_TS);
OUT_RING          468 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, rbmemptr(ring, fence));
OUT_RING          469 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, submit->seqno);
OUT_RING          471 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, 0x80000000);
OUT_RING          478 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, CP_REG(REG_A3XX_HLSQ_CL_KERNEL_GROUP_X_REG));
OUT_RING          479 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		OUT_RING(ring, 0x00000000);
OUT_RING          262 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
OUT_RING          270 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	OUT_RING(ring, CP_TYPE2_PKT);
OUT_RING          277 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
OUT_RING          299 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	OUT_RING(ring, PKT4(regindx, cnt));
OUT_RING          306 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	OUT_RING(ring, CP_TYPE7_PKT | (cnt << 0) | (PM4_PARITY(cnt) << 15) |
OUT_RING         1123 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	OUT_RING  (chan, 0x00000000);
OUT_RING         1206 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		OUT_RING  (chan, 0);
OUT_RING         1208 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		OUT_RING  (chan, head);
OUT_RING         1210 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		OUT_RING  (chan, 0);
OUT_RING         1212 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		OUT_RING  (chan, 0);
OUT_RING          744 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, handle & 0x0000ffff);
OUT_RING          758 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(mem->vma[0].addr));
OUT_RING          759 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(mem->vma[0].addr));
OUT_RING          760 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(mem->vma[1].addr));
OUT_RING          761 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(mem->vma[1].addr));
OUT_RING          762 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          763 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          764 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          765 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, new_reg->num_pages);
OUT_RING          777 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, handle);
OUT_RING          801 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(src_offset));
OUT_RING          802 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(src_offset));
OUT_RING          803 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(dst_offset));
OUT_RING          804 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(dst_offset));
OUT_RING          805 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          806 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          807 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          808 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, line_count);
OUT_RING          810 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00000110);
OUT_RING          839 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(dst_offset));
OUT_RING          840 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(dst_offset));
OUT_RING          842 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(src_offset));
OUT_RING          843 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(src_offset));
OUT_RING          844 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
OUT_RING          845 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
OUT_RING          846 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE); /* line_length */
OUT_RING          847 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, line_count);
OUT_RING          849 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00100110);
OUT_RING          878 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(src_offset));
OUT_RING          879 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(src_offset));
OUT_RING          880 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(dst_offset));
OUT_RING          881 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(dst_offset));
OUT_RING          882 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          883 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          884 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE);
OUT_RING          885 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, line_count);
OUT_RING          887 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00000110);
OUT_RING          905 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(mem->vma[0].addr));
OUT_RING          906 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(mem->vma[0].addr));
OUT_RING          907 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(mem->vma[1].addr));
OUT_RING          908 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(mem->vma[1].addr));
OUT_RING          909 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00000000 /* COPY */);
OUT_RING          910 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, new_reg->num_pages << PAGE_SHIFT);
OUT_RING          923 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, new_reg->num_pages << PAGE_SHIFT);
OUT_RING          924 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(mem->vma[0].addr));
OUT_RING          925 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(mem->vma[0].addr));
OUT_RING          926 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(mem->vma[1].addr));
OUT_RING          927 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(mem->vma[1].addr));
OUT_RING          928 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00000000 /* MODE_COPY, QUERY_NONE */);
OUT_RING          939 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, handle);
OUT_RING          941 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, chan->drm->ntfy.handle);
OUT_RING          942 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, chan->vram.handle);
OUT_RING          943 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, chan->vram.handle);
OUT_RING          974 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 0);
OUT_RING          975 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 0);
OUT_RING          976 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, stride);
OUT_RING          977 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, height);
OUT_RING          978 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 1);
OUT_RING          979 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 0);
OUT_RING          980 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 0);
OUT_RING          983 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 1);
OUT_RING          987 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 0);
OUT_RING          988 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 0);
OUT_RING          989 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, stride);
OUT_RING          990 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, height);
OUT_RING          991 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 1);
OUT_RING          992 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 0);
OUT_RING          993 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 0);
OUT_RING          996 drivers/gpu/drm/nouveau/nouveau_bo.c 			OUT_RING  (chan, 1);
OUT_RING         1000 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(src_offset));
OUT_RING         1001 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, upper_32_bits(dst_offset));
OUT_RING         1003 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(src_offset));
OUT_RING         1004 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, lower_32_bits(dst_offset));
OUT_RING         1005 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, stride);
OUT_RING         1006 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, stride);
OUT_RING         1007 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, stride);
OUT_RING         1008 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, height);
OUT_RING         1009 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00000101);
OUT_RING         1010 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00000000);
OUT_RING         1012 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0);
OUT_RING         1028 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, handle);
OUT_RING         1030 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, chan->drm->ntfy.handle);
OUT_RING         1059 drivers/gpu/drm/nouveau/nouveau_bo.c 	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, old_reg));
OUT_RING         1060 drivers/gpu/drm/nouveau/nouveau_bo.c 	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, new_reg));
OUT_RING         1072 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, src_offset);
OUT_RING         1073 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, dst_offset);
OUT_RING         1074 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
OUT_RING         1075 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
OUT_RING         1076 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, PAGE_SIZE); /* line_length */
OUT_RING         1077 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, line_count);
OUT_RING         1078 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00000101);
OUT_RING         1079 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0x00000000);
OUT_RING         1081 drivers/gpu/drm/nouveau/nouveau_bo.c 		OUT_RING  (chan, 0);
OUT_RING          450 drivers/gpu/drm/nouveau/nouveau_chan.c 		OUT_RING(chan, 0x00000000);
OUT_RING          465 drivers/gpu/drm/nouveau/nouveau_chan.c 		OUT_RING  (chan, chan->nvsw.handle);
OUT_RING          225 drivers/gpu/drm/nouveau/nouveau_dma.c 			OUT_RING(chan, chan->push.addr | 0x20000000);
OUT_RING          111 drivers/gpu/drm/nouveau/nouveau_dma.h 	OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd);
OUT_RING          117 drivers/gpu/drm/nouveau/nouveau_dma.h 	OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd);
OUT_RING          123 drivers/gpu/drm/nouveau/nouveau_dma.h 	OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2));
OUT_RING          129 drivers/gpu/drm/nouveau/nouveau_dma.h 	OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2));
OUT_RING          135 drivers/gpu/drm/nouveau/nouveau_dma.h 	OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2));
OUT_RING          459 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, upper_32_bits(src_addr));
OUT_RING          460 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, lower_32_bits(src_addr));
OUT_RING          461 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, upper_32_bits(dst_addr));
OUT_RING          462 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, lower_32_bits(dst_addr));
OUT_RING          463 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, PAGE_SIZE);
OUT_RING          464 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, PAGE_SIZE);
OUT_RING          465 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, PAGE_SIZE);
OUT_RING          466 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, npages);
OUT_RING          468 drivers/gpu/drm/nouveau/nouveau_dmem.c 	OUT_RING  (chan, launch_dma);
OUT_RING          373 drivers/gpu/drm/nouveau/nouveau_drm.c 				OUT_RING  (drm->channel, drm->nvsw.handle);
OUT_RING          801 drivers/gpu/drm/nouveau/nouveau_gem.c 			OUT_RING(chan, (nvbo->bo.offset + push[i].offset) | 2);
OUT_RING          802 drivers/gpu/drm/nouveau/nouveau_gem.c 			OUT_RING(chan, 0);
OUT_RING          835 drivers/gpu/drm/nouveau/nouveau_gem.c 			OUT_RING(chan, 0x20000000 |
OUT_RING          837 drivers/gpu/drm/nouveau/nouveau_gem.c 			OUT_RING(chan, 0);
OUT_RING          839 drivers/gpu/drm/nouveau/nouveau_gem.c 				OUT_RING(chan, 0);
OUT_RING           42 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (region->sy << 16) | region->sx);
OUT_RING           43 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (region->dy << 16) | region->dx);
OUT_RING           44 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (region->height << 16) | region->width);
OUT_RING           62 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3);
OUT_RING           66 drivers/gpu/drm/nouveau/nv04_fbcon.c 		OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
OUT_RING           68 drivers/gpu/drm/nouveau/nv04_fbcon.c 		OUT_RING(chan, rect->color);
OUT_RING           70 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (rect->dx << 16) | rect->dy);
OUT_RING           71 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (rect->width << 16) | rect->height);
OUT_RING          105 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
OUT_RING          106 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, ((image->dy + image->height) << 16) |
OUT_RING          108 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, bg);
OUT_RING          109 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, fg);
OUT_RING          110 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (image->height << 16) | ALIGN(image->width, 8));
OUT_RING          111 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (image->height << 16) | image->width);
OUT_RING          112 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
OUT_RING          209 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->surf2d.handle);
OUT_RING          211 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, chan->vram.handle);
OUT_RING          212 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, chan->vram.handle);
OUT_RING          214 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, surface_fmt);
OUT_RING          215 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
OUT_RING          216 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
OUT_RING          217 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
OUT_RING          220 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->rop.handle);
OUT_RING          222 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 0x55);
OUT_RING          225 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->patt.handle);
OUT_RING          227 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, pattern_fmt);
OUT_RING          229 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 2);
OUT_RING          231 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          233 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          234 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          235 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, ~0);
OUT_RING          236 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, ~0);
OUT_RING          237 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, ~0);
OUT_RING          238 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, ~0);
OUT_RING          241 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->clip.handle);
OUT_RING          243 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          244 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
OUT_RING          247 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->blit.handle);
OUT_RING          249 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->surf2d.handle);
OUT_RING          251 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 3);
OUT_RING          254 drivers/gpu/drm/nouveau/nv04_fbcon.c 		OUT_RING(chan, 0);
OUT_RING          255 drivers/gpu/drm/nouveau/nv04_fbcon.c 		OUT_RING(chan, 1);
OUT_RING          256 drivers/gpu/drm/nouveau/nv04_fbcon.c 		OUT_RING(chan, 2);
OUT_RING          260 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->gdi.handle);
OUT_RING          262 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->surf2d.handle);
OUT_RING          264 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->patt.handle);
OUT_RING          265 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, nfbdev->rop.handle);
OUT_RING          267 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          269 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, rect_fmt);
OUT_RING          271 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, 3);
OUT_RING           46 drivers/gpu/drm/nouveau/nv04_fence.c 		OUT_RING  (chan, fence->base.seqno);
OUT_RING           36 drivers/gpu/drm/nouveau/nv10_fence.c 		OUT_RING  (chan, fence->base.seqno);
OUT_RING           54 drivers/gpu/drm/nouveau/nv17_fence.c 		OUT_RING  (prev, fctx->sema.handle);
OUT_RING           55 drivers/gpu/drm/nouveau/nv17_fence.c 		OUT_RING  (prev, 0);
OUT_RING           56 drivers/gpu/drm/nouveau/nv17_fence.c 		OUT_RING  (prev, value + 0);
OUT_RING           57 drivers/gpu/drm/nouveau/nv17_fence.c 		OUT_RING  (prev, value + 1);
OUT_RING           63 drivers/gpu/drm/nouveau/nv17_fence.c 		OUT_RING  (chan, fctx->sema.handle);
OUT_RING           64 drivers/gpu/drm/nouveau/nv17_fence.c 		OUT_RING  (chan, 0);
OUT_RING           65 drivers/gpu/drm/nouveau/nv17_fence.c 		OUT_RING  (chan, value + 1);
OUT_RING           66 drivers/gpu/drm/nouveau/nv17_fence.c 		OUT_RING  (chan, value + 2);
OUT_RING           44 drivers/gpu/drm/nouveau/nv50_fbcon.c 		OUT_RING(chan, 1);
OUT_RING           49 drivers/gpu/drm/nouveau/nv50_fbcon.c 		OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
OUT_RING           51 drivers/gpu/drm/nouveau/nv50_fbcon.c 		OUT_RING(chan, rect->color);
OUT_RING           53 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, rect->dx);
OUT_RING           54 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, rect->dy);
OUT_RING           55 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, rect->dx + rect->width);
OUT_RING           56 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, rect->dy + rect->height);
OUT_RING           59 drivers/gpu/drm/nouveau/nv50_fbcon.c 		OUT_RING(chan, 3);
OUT_RING           78 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING           80 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, region->dx);
OUT_RING           81 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, region->dy);
OUT_RING           82 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, region->width);
OUT_RING           83 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, region->height);
OUT_RING           85 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING           86 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, region->sx);
OUT_RING           87 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING           88 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, region->sy);
OUT_RING          114 drivers/gpu/drm/nouveau/nv50_fbcon.c 		OUT_RING(chan, palette[image->bg_color] | mask);
OUT_RING          115 drivers/gpu/drm/nouveau/nv50_fbcon.c 		OUT_RING(chan, palette[image->fg_color] | mask);
OUT_RING          117 drivers/gpu/drm/nouveau/nv50_fbcon.c 		OUT_RING(chan, image->bg_color);
OUT_RING          118 drivers/gpu/drm/nouveau/nv50_fbcon.c 		OUT_RING(chan, image->fg_color);
OUT_RING          121 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, image->width);
OUT_RING          122 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, image->height);
OUT_RING          124 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          125 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, image->dx);
OUT_RING          126 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          127 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, image->dy);
OUT_RING          197 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, nfbdev->twod.handle);
OUT_RING          199 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, chan->vram.handle);
OUT_RING          200 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, chan->vram.handle);
OUT_RING          201 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, chan->vram.handle);
OUT_RING          203 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          205 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          207 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 3);
OUT_RING          209 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0x55);
OUT_RING          211 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          212 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          213 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          214 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          216 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 4);
OUT_RING          217 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, format);
OUT_RING          219 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 2);
OUT_RING          220 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          222 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, format);
OUT_RING          224 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          226 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          227 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          228 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          230 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          232 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          233 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          234 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 0);
OUT_RING          235 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          237 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, format);
OUT_RING          238 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          240 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, info->fix.line_length);
OUT_RING          241 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, info->var.xres_virtual);
OUT_RING          242 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, info->var.yres_virtual);
OUT_RING          243 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, upper_32_bits(fb->vma->addr));
OUT_RING          244 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, lower_32_bits(fb->vma->addr));
OUT_RING          246 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, format);
OUT_RING          247 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, 1);
OUT_RING          249 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, info->fix.line_length);
OUT_RING          250 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, info->var.xres_virtual);
OUT_RING          251 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, info->var.yres_virtual);
OUT_RING          252 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, upper_32_bits(fb->vma->addr));
OUT_RING          253 drivers/gpu/drm/nouveau/nv50_fbcon.c 	OUT_RING(chan, lower_32_bits(fb->vma->addr));
OUT_RING           38 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, chan->vram.handle);
OUT_RING           40 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, upper_32_bits(virtual));
OUT_RING           41 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, lower_32_bits(virtual));
OUT_RING           42 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, sequence);
OUT_RING           43 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);
OUT_RING           44 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, 0x00000000);
OUT_RING           56 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, chan->vram.handle);
OUT_RING           58 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, upper_32_bits(virtual));
OUT_RING           59 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, lower_32_bits(virtual));
OUT_RING           60 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, sequence);
OUT_RING           61 drivers/gpu/drm/nouveau/nv84_fence.c 		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL);
OUT_RING           44 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		OUT_RING  (chan, 1);
OUT_RING           49 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		OUT_RING  (chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
OUT_RING           51 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		OUT_RING  (chan, rect->color);
OUT_RING           53 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, rect->dx);
OUT_RING           54 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, rect->dy);
OUT_RING           55 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, rect->dx + rect->width);
OUT_RING           56 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, rect->dy + rect->height);
OUT_RING           59 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		OUT_RING  (chan, 3);
OUT_RING           78 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING           80 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, region->dx);
OUT_RING           81 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, region->dy);
OUT_RING           82 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, region->width);
OUT_RING           83 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, region->height);
OUT_RING           85 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING           86 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, region->sx);
OUT_RING           87 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING           88 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, region->sy);
OUT_RING          114 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		OUT_RING  (chan, palette[image->bg_color] | mask);
OUT_RING          115 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		OUT_RING  (chan, palette[image->fg_color] | mask);
OUT_RING          117 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		OUT_RING  (chan, image->bg_color);
OUT_RING          118 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		OUT_RING  (chan, image->fg_color);
OUT_RING          121 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, image->width);
OUT_RING          122 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, image->height);
OUT_RING          124 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          125 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, image->dx);
OUT_RING          126 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          127 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, image->dy);
OUT_RING          198 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, nfbdev->twod.handle);
OUT_RING          200 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          202 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          204 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 3);
OUT_RING          206 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0x55);
OUT_RING          208 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          209 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          210 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          211 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          213 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 4);
OUT_RING          214 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, format);
OUT_RING          216 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 2);
OUT_RING          217 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          220 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, format);
OUT_RING          222 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          224 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          225 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          226 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          228 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          230 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          231 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          232 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          233 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          235 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, format);
OUT_RING          236 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          237 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          238 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          239 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          240 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, info->fix.line_length);
OUT_RING          241 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, info->var.xres_virtual);
OUT_RING          242 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, info->var.yres_virtual);
OUT_RING          243 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, upper_32_bits(fb->vma->addr));
OUT_RING          244 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, lower_32_bits(fb->vma->addr));
OUT_RING          246 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, format);
OUT_RING          247 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          248 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          249 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 1);
OUT_RING          250 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, 0);
OUT_RING          251 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, info->fix.line_length);
OUT_RING          252 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, info->var.xres_virtual);
OUT_RING          253 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, info->var.yres_virtual);
OUT_RING          254 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, upper_32_bits(fb->vma->addr));
OUT_RING          255 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	OUT_RING  (chan, lower_32_bits(fb->vma->addr));
OUT_RING           37 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, upper_32_bits(virtual));
OUT_RING           38 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, lower_32_bits(virtual));
OUT_RING           39 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, sequence);
OUT_RING           40 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);
OUT_RING           41 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, 0x00000000);
OUT_RING           53 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, upper_32_bits(virtual));
OUT_RING           54 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, lower_32_bits(virtual));
OUT_RING           55 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, sequence);
OUT_RING           56 drivers/gpu/drm/nouveau/nvc0_fence.c 		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL |
OUT_RING          476 drivers/gpu/drm/r128/r128_drv.h 	OUT_RING(CCE_PACKET0(R128_WAIT_UNTIL, 0));			\
OUT_RING          477 drivers/gpu/drm/r128/r128_drv.h 	OUT_RING(R128_EVENT_CRTC_OFFSET);				\
OUT_RING           56 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET0(R128_AUX1_SC_LEFT, 3));
OUT_RING           57 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[0].x1);
OUT_RING           58 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[0].x2 - 1);
OUT_RING           59 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[0].y1);
OUT_RING           60 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[0].y2 - 1);
OUT_RING           65 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET0(R128_AUX2_SC_LEFT, 3));
OUT_RING           66 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[1].x1);
OUT_RING           67 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[1].x2 - 1);
OUT_RING           68 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[1].y1);
OUT_RING           69 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[1].y2 - 1);
OUT_RING           74 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET0(R128_AUX3_SC_LEFT, 3));
OUT_RING           75 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[2].x1);
OUT_RING           76 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[2].x2 - 1);
OUT_RING           77 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[2].y1);
OUT_RING           78 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(boxes[2].y2 - 1);
OUT_RING           83 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_AUX_SC_CNTL, 0));
OUT_RING           84 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(aux_sc_cntl);
OUT_RING           98 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_SCALE_3D_CNTL, 0));
OUT_RING           99 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->scale_3d_cntl);
OUT_RING          113 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_DST_PITCH_OFFSET_C, 11));
OUT_RING          114 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->dst_pitch_offset_c);
OUT_RING          115 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->dp_gui_master_cntl_c);
OUT_RING          116 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->sc_top_left_c);
OUT_RING          117 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->sc_bottom_right_c);
OUT_RING          118 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->z_offset_c);
OUT_RING          119 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->z_pitch_c);
OUT_RING          120 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->z_sten_cntl_c);
OUT_RING          121 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->tex_cntl_c);
OUT_RING          122 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->misc_3d_state_cntl_reg);
OUT_RING          123 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->texture_clr_cmp_clr_c);
OUT_RING          124 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->texture_clr_cmp_msk_c);
OUT_RING          125 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->fog_color_c);
OUT_RING          139 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET1(R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP));
OUT_RING          140 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->setup_cntl);
OUT_RING          141 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->pm4_vc_fpu_setup);
OUT_RING          155 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0));
OUT_RING          156 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->dp_write_mask);
OUT_RING          158 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_STEN_REF_MASK_C, 1));
OUT_RING          159 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->sten_ref_mask_c);
OUT_RING          160 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->plane_3d_mask_c);
OUT_RING          174 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_WINDOW_XY_OFFSET, 0));
OUT_RING          175 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->window_xy_offset);
OUT_RING          191 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_PRIM_TEX_CNTL_C,
OUT_RING          193 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(tex->tex_cntl);
OUT_RING          194 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(tex->tex_combine_cntl);
OUT_RING          195 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->tex_size_pitch_c);
OUT_RING          197 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(tex->tex_offset[i]);
OUT_RING          199 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1));
OUT_RING          200 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(ctx->constant_color_c);
OUT_RING          201 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(tex->tex_border_color);
OUT_RING          216 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS));
OUT_RING          217 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(tex->tex_cntl);
OUT_RING          218 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(tex->tex_combine_cntl);
OUT_RING          220 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(tex->tex_offset[i]);
OUT_RING          222 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0));
OUT_RING          223 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(tex->tex_border_color);
OUT_RING          311 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
OUT_RING          312 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
OUT_RING          319 drivers/gpu/drm/r128/r128_state.c 	OUT_RING((pitch << 21) | (offset >> 5));
OUT_RING          320 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(color);
OUT_RING          322 drivers/gpu/drm/r128/r128_state.c 	OUT_RING((x << 16) | y);
OUT_RING          323 drivers/gpu/drm/r128/r128_state.c 	OUT_RING((w << 16) | h);
OUT_RING          393 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0));
OUT_RING          394 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(clear->color_mask);
OUT_RING          402 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
OUT_RING          403 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
OUT_RING          411 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->front_pitch_offset_c);
OUT_RING          412 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(clear->clear_color);
OUT_RING          414 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((x << 16) | y);
OUT_RING          415 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((w << 16) | h);
OUT_RING          423 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
OUT_RING          424 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
OUT_RING          432 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->back_pitch_offset_c);
OUT_RING          433 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(clear->clear_color);
OUT_RING          435 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((x << 16) | y);
OUT_RING          436 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((w << 16) | h);
OUT_RING          444 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
OUT_RING          445 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
OUT_RING          453 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->depth_pitch_offset_c);
OUT_RING          454 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(clear->clear_depth);
OUT_RING          456 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((x << 16) | y);
OUT_RING          457 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((w << 16) | h);
OUT_RING          488 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
OUT_RING          489 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
OUT_RING          502 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->back_pitch_offset_c);
OUT_RING          503 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->front_pitch_offset_c);
OUT_RING          505 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->front_pitch_offset_c);
OUT_RING          506 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->back_pitch_offset_c);
OUT_RING          509 drivers/gpu/drm/r128/r128_state.c 		OUT_RING((x << 16) | y);
OUT_RING          510 drivers/gpu/drm/r128/r128_state.c 		OUT_RING((x << 16) | y);
OUT_RING          511 drivers/gpu/drm/r128/r128_state.c 		OUT_RING((w << 16) | h);
OUT_RING          524 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_LAST_FRAME_REG, 0));
OUT_RING          525 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(dev_priv->sarea_priv->last_frame);
OUT_RING          546 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0));
OUT_RING          549 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(dev_priv->back_offset);
OUT_RING          551 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(dev_priv->front_offset);
OUT_RING          565 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_LAST_FRAME_REG, 0));
OUT_RING          566 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(dev_priv->sarea_priv->last_frame);
OUT_RING          604 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(CCE_PACKET3(R128_3D_RNDR_GEN_INDX_PRIM, 3));
OUT_RING          605 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(offset);
OUT_RING          606 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(size);
OUT_RING          607 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(format);
OUT_RING          608 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST |
OUT_RING          623 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
OUT_RING          624 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(buf_priv->age);
OUT_RING          668 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET0(R128_PM4_IW_INDOFF, 1));
OUT_RING          669 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(offset);
OUT_RING          670 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(dwords);
OUT_RING          681 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
OUT_RING          682 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(buf_priv->age);
OUT_RING          762 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
OUT_RING          763 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(buf_priv->age);
OUT_RING          822 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_PC_GUI_CTLSTAT, 0));
OUT_RING          823 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(R128_PC_RI_GUI | R128_PC_FLUSH_GUI);
OUT_RING          875 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_PC_GUI_CTLSTAT, 0));
OUT_RING          876 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(R128_PC_FLUSH_GUI);
OUT_RING          927 drivers/gpu/drm/r128/r128_state.c 				OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
OUT_RING          928 drivers/gpu/drm/r128/r128_state.c 				OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
OUT_RING          936 drivers/gpu/drm/r128/r128_state.c 				OUT_RING(dev_priv->depth_pitch_offset_c);
OUT_RING          937 drivers/gpu/drm/r128/r128_state.c 				OUT_RING(buffer[i]);
OUT_RING          939 drivers/gpu/drm/r128/r128_state.c 				OUT_RING((x << 16) | y);
OUT_RING          940 drivers/gpu/drm/r128/r128_state.c 				OUT_RING((1 << 16) | 1);
OUT_RING          951 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
OUT_RING          952 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
OUT_RING          960 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->depth_pitch_offset_c);
OUT_RING          961 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(buffer[i]);
OUT_RING          963 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((x << 16) | y);
OUT_RING          964 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((1 << 16) | 1);
OUT_RING         1022 drivers/gpu/drm/r128/r128_state.c 				OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
OUT_RING         1023 drivers/gpu/drm/r128/r128_state.c 				OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
OUT_RING         1031 drivers/gpu/drm/r128/r128_state.c 				OUT_RING(dev_priv->depth_pitch_offset_c);
OUT_RING         1032 drivers/gpu/drm/r128/r128_state.c 				OUT_RING(buffer[i]);
OUT_RING         1034 drivers/gpu/drm/r128/r128_state.c 				OUT_RING((x[i] << 16) | y[i]);
OUT_RING         1035 drivers/gpu/drm/r128/r128_state.c 				OUT_RING((1 << 16) | 1);
OUT_RING         1046 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
OUT_RING         1047 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
OUT_RING         1055 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(dev_priv->depth_pitch_offset_c);
OUT_RING         1056 drivers/gpu/drm/r128/r128_state.c 			OUT_RING(buffer[i]);
OUT_RING         1058 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((x[i] << 16) | y[i]);
OUT_RING         1059 drivers/gpu/drm/r128/r128_state.c 			OUT_RING((1 << 16) | 1);
OUT_RING         1091 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
OUT_RING         1092 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
OUT_RING         1101 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(dev_priv->depth_pitch_offset_c);
OUT_RING         1102 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(dev_priv->span_pitch_offset_c);
OUT_RING         1104 drivers/gpu/drm/r128/r128_state.c 	OUT_RING((x << 16) | y);
OUT_RING         1105 drivers/gpu/drm/r128/r128_state.c 	OUT_RING((0 << 16) | 0);
OUT_RING         1106 drivers/gpu/drm/r128/r128_state.c 	OUT_RING((count << 16) | 1);
OUT_RING         1153 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
OUT_RING         1154 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
OUT_RING         1163 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(dev_priv->depth_pitch_offset_c);
OUT_RING         1164 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(dev_priv->span_pitch_offset_c);
OUT_RING         1166 drivers/gpu/drm/r128/r128_state.c 		OUT_RING((x[i] << 16) | y[i]);
OUT_RING         1167 drivers/gpu/drm/r128/r128_state.c 		OUT_RING((i << 16) | 0);
OUT_RING         1168 drivers/gpu/drm/r128/r128_state.c 		OUT_RING((1 << 16) | 1);
OUT_RING         1192 drivers/gpu/drm/r128/r128_state.c 	OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31));
OUT_RING         1194 drivers/gpu/drm/r128/r128_state.c 		OUT_RING(stipple[i]);
OUT_RING         1549 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
OUT_RING         1550 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(MI_NOOP);
OUT_RING         1687 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br00);
OUT_RING         1688 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br13);
OUT_RING         1689 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br14);
OUT_RING         1690 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br09);
OUT_RING         1691 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br16);
OUT_RING         1692 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(MI_NOOP);
OUT_RING         1736 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br00);
OUT_RING         1737 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br13);
OUT_RING         1738 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br22);
OUT_RING         1739 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br23);
OUT_RING         1740 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br09);
OUT_RING         1741 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br26);
OUT_RING         1742 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br11);
OUT_RING         1743 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br12);
OUT_RING         1805 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br00);
OUT_RING         1806 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br13);
OUT_RING         1807 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br22);
OUT_RING         1808 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br23);
OUT_RING         1809 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br09);
OUT_RING         1810 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br18);
OUT_RING         1811 drivers/video/fbdev/intelfb/intelfbhw.c 	OUT_RING(br19);
OUT_RING         1826 drivers/video/fbdev/intelfb/intelfbhw.c 		OUT_RING(dat);
OUT_RING         1829 drivers/video/fbdev/intelfb/intelfbhw.c 		OUT_RING(MI_NOOP);