OP_MASK          2306 arch/powerpc/xmon/ppc-opc.c #define OPTO_MASK (OP_MASK | TO_MASK)
OP_MASK          2425 arch/powerpc/xmon/ppc-opc.c #define DRA_MASK (OP_MASK | RA_MASK)
OP_MASK          2495 arch/powerpc/xmon/ppc-opc.c #define SC_MASK (OP_MASK | (((unsigned long)0x3ff) << 16) | (((unsigned long)1) << 1) | 1)
OP_MASK          3053 arch/powerpc/xmon/ppc-opc.c {"tdi",		OP(2),		OP_MASK,     PPC64,	PPCVLE,		{TO, RA, SI}},
OP_MASK          3085 arch/powerpc/xmon/ppc-opc.c {"twi",		OP(3),		OP_MASK,     PPCCOM,	PPCVLE,		{TO, RA, SI}},
OP_MASK          3086 arch/powerpc/xmon/ppc-opc.c {"ti",		OP(3),		OP_MASK,     PWRCOM,	PPCVLE,		{TO, RA, SI}},
OP_MASK          3825 arch/powerpc/xmon/ppc-opc.c {"mulli",	OP(7),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3826 arch/powerpc/xmon/ppc-opc.c {"muli",	OP(7),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3828 arch/powerpc/xmon/ppc-opc.c {"subfic",	OP(8),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3829 arch/powerpc/xmon/ppc-opc.c {"sfi",		OP(8),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3831 arch/powerpc/xmon/ppc-opc.c {"dozi",	OP(9),		OP_MASK,     M601,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3835 arch/powerpc/xmon/ppc-opc.c {"cmpli",	OP(10),		OP_MASK,     PPC,	PPCVLE,		{BF, L32OPT, RA, UISIGNOPT}},
OP_MASK          3836 arch/powerpc/xmon/ppc-opc.c {"cmpli",	OP(10),		OP_MASK,     PWRCOM,	PPC|PPCVLE,	{BF, RA, UISIGNOPT}},
OP_MASK          3840 arch/powerpc/xmon/ppc-opc.c {"cmpi",	OP(11),		OP_MASK,     PPC,	PPCVLE,		{BF, L32OPT, RA, SI}},
OP_MASK          3841 arch/powerpc/xmon/ppc-opc.c {"cmpi",	OP(11),		OP_MASK,     PWRCOM,	PPC|PPCVLE,	{BF, RA, SI}},
OP_MASK          3843 arch/powerpc/xmon/ppc-opc.c {"addic",	OP(12),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3844 arch/powerpc/xmon/ppc-opc.c {"ai",		OP(12),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3845 arch/powerpc/xmon/ppc-opc.c {"subic",	OP(12),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA, NSI}},
OP_MASK          3847 arch/powerpc/xmon/ppc-opc.c {"addic.",	OP(13),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3848 arch/powerpc/xmon/ppc-opc.c {"ai.",		OP(13),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, RA, SI}},
OP_MASK          3849 arch/powerpc/xmon/ppc-opc.c {"subic.",	OP(13),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA, NSI}},
OP_MASK          3853 arch/powerpc/xmon/ppc-opc.c {"addi",	OP(14),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA0, SI}},
OP_MASK          3854 arch/powerpc/xmon/ppc-opc.c {"cal",		OP(14),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          3855 arch/powerpc/xmon/ppc-opc.c {"subi",	OP(14),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA0, NSI}},
OP_MASK          3856 arch/powerpc/xmon/ppc-opc.c {"la",		OP(14),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          3860 arch/powerpc/xmon/ppc-opc.c {"addis",	OP(15),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA0, SISIGNOPT}},
OP_MASK          3861 arch/powerpc/xmon/ppc-opc.c {"cau",		OP(15),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, RA0, SISIGNOPT}},
OP_MASK          3862 arch/powerpc/xmon/ppc-opc.c {"subis",	OP(15),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, RA0, NSISIGNOPT}},
OP_MASK          4613 arch/powerpc/xmon/ppc-opc.c {"ori",		OP(24),		OP_MASK,     PPCCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4614 arch/powerpc/xmon/ppc-opc.c {"oril",	OP(24),		OP_MASK,     PWRCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4616 arch/powerpc/xmon/ppc-opc.c {"oris",	OP(25),		OP_MASK,     PPCCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4617 arch/powerpc/xmon/ppc-opc.c {"oriu",	OP(25),		OP_MASK,     PWRCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4620 arch/powerpc/xmon/ppc-opc.c {"xori",	OP(26),		OP_MASK,     PPCCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4621 arch/powerpc/xmon/ppc-opc.c {"xoril",	OP(26),		OP_MASK,     PWRCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4623 arch/powerpc/xmon/ppc-opc.c {"xoris",	OP(27),		OP_MASK,     PPCCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4624 arch/powerpc/xmon/ppc-opc.c {"xoriu",	OP(27),		OP_MASK,     PWRCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4626 arch/powerpc/xmon/ppc-opc.c {"andi.",	OP(28),		OP_MASK,     PPCCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4627 arch/powerpc/xmon/ppc-opc.c {"andil.",	OP(28),		OP_MASK,     PWRCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4629 arch/powerpc/xmon/ppc-opc.c {"andis.",	OP(29),		OP_MASK,     PPCCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          4630 arch/powerpc/xmon/ppc-opc.c {"andiu.",	OP(29),		OP_MASK,     PWRCOM,	PPCVLE,		{RA, RS, UI}},
OP_MASK          6284 arch/powerpc/xmon/ppc-opc.c {"lwz",		OP(32),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          6285 arch/powerpc/xmon/ppc-opc.c {"l",		OP(32),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          6287 arch/powerpc/xmon/ppc-opc.c {"lwzu",	OP(33),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, D, RAL}},
OP_MASK          6288 arch/powerpc/xmon/ppc-opc.c {"lu",		OP(33),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          6290 arch/powerpc/xmon/ppc-opc.c {"lbz",		OP(34),		OP_MASK,     COM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          6292 arch/powerpc/xmon/ppc-opc.c {"lbzu",	OP(35),		OP_MASK,     COM,	PPCVLE,		{RT, D, RAL}},
OP_MASK          6294 arch/powerpc/xmon/ppc-opc.c {"stw",		OP(36),		OP_MASK,     PPCCOM,	PPCVLE,		{RS, D, RA0}},
OP_MASK          6295 arch/powerpc/xmon/ppc-opc.c {"st",		OP(36),		OP_MASK,     PWRCOM,	PPCVLE,		{RS, D, RA0}},
OP_MASK          6297 arch/powerpc/xmon/ppc-opc.c {"stwu",	OP(37),		OP_MASK,     PPCCOM,	PPCVLE,		{RS, D, RAS}},
OP_MASK          6298 arch/powerpc/xmon/ppc-opc.c {"stu",		OP(37),		OP_MASK,     PWRCOM,	PPCVLE,		{RS, D, RA0}},
OP_MASK          6300 arch/powerpc/xmon/ppc-opc.c {"stb",		OP(38),		OP_MASK,     COM,	PPCVLE,		{RS, D, RA0}},
OP_MASK          6302 arch/powerpc/xmon/ppc-opc.c {"stbu",	OP(39),		OP_MASK,     COM,	PPCVLE,		{RS, D, RAS}},
OP_MASK          6304 arch/powerpc/xmon/ppc-opc.c {"lhz",		OP(40),		OP_MASK,     COM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          6306 arch/powerpc/xmon/ppc-opc.c {"lhzu",	OP(41),		OP_MASK,     COM,	PPCVLE,		{RT, D, RAL}},
OP_MASK          6308 arch/powerpc/xmon/ppc-opc.c {"lha",		OP(42),		OP_MASK,     COM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          6310 arch/powerpc/xmon/ppc-opc.c {"lhau",	OP(43),		OP_MASK,     COM,	PPCVLE,		{RT, D, RAL}},
OP_MASK          6312 arch/powerpc/xmon/ppc-opc.c {"sth",		OP(44),		OP_MASK,     COM,	PPCVLE,		{RS, D, RA0}},
OP_MASK          6314 arch/powerpc/xmon/ppc-opc.c {"sthu",	OP(45),		OP_MASK,     COM,	PPCVLE,		{RS, D, RAS}},
OP_MASK          6316 arch/powerpc/xmon/ppc-opc.c {"lmw",		OP(46),		OP_MASK,     PPCCOM,	PPCVLE,		{RT, D, RAM}},
OP_MASK          6317 arch/powerpc/xmon/ppc-opc.c {"lm",		OP(46),		OP_MASK,     PWRCOM,	PPCVLE,		{RT, D, RA0}},
OP_MASK          6319 arch/powerpc/xmon/ppc-opc.c {"stmw",	OP(47),		OP_MASK,     PPCCOM,	PPCVLE,		{RS, D, RA0}},
OP_MASK          6320 arch/powerpc/xmon/ppc-opc.c {"stm",		OP(47),		OP_MASK,     PWRCOM,	PPCVLE,		{RS, D, RA0}},
OP_MASK          6322 arch/powerpc/xmon/ppc-opc.c {"lfs",		OP(48),		OP_MASK,     COM,	PPCEFS|PPCVLE,	{FRT, D, RA0}},
OP_MASK          6324 arch/powerpc/xmon/ppc-opc.c {"lfsu",	OP(49),		OP_MASK,     COM,	PPCEFS|PPCVLE,	{FRT, D, RAS}},
OP_MASK          6326 arch/powerpc/xmon/ppc-opc.c {"lfd",		OP(50),		OP_MASK,     COM,	PPCEFS|PPCVLE,	{FRT, D, RA0}},
OP_MASK          6328 arch/powerpc/xmon/ppc-opc.c {"lfdu",	OP(51),		OP_MASK,     COM,	PPCEFS|PPCVLE,	{FRT, D, RAS}},
OP_MASK          6330 arch/powerpc/xmon/ppc-opc.c {"stfs",	OP(52),		OP_MASK,     COM,	PPCEFS|PPCVLE,	{FRS, D, RA0}},
OP_MASK          6332 arch/powerpc/xmon/ppc-opc.c {"stfsu",	OP(53),		OP_MASK,     COM,	PPCEFS|PPCVLE,	{FRS, D, RAS}},
OP_MASK          6334 arch/powerpc/xmon/ppc-opc.c {"stfd",	OP(54),		OP_MASK,     COM,	PPCEFS|PPCVLE,	{FRS, D, RA0}},
OP_MASK          6336 arch/powerpc/xmon/ppc-opc.c {"stfdu",	OP(55),		OP_MASK,     COM,	PPCEFS|PPCVLE,	{FRS, D, RAS}},
OP_MASK          6338 arch/powerpc/xmon/ppc-opc.c {"lq",		OP(56),		OP_MASK,     POWER4,	PPC476|PPCVLE,	{RTQ, DQ, RAQ}},
OP_MASK          6339 arch/powerpc/xmon/ppc-opc.c {"psq_l",	OP(56),		OP_MASK,     PPCPS,	PPCVLE,		{FRT,PSD,RA,PSW,PSQ}},
OP_MASK          6340 arch/powerpc/xmon/ppc-opc.c {"lfq",		OP(56),		OP_MASK,     POWER2,	PPCVLE,		{FRT, D, RA0}},
OP_MASK          6344 arch/powerpc/xmon/ppc-opc.c {"lfdp",	OP(57),		OP_MASK,     POWER6,	POWER7|PPCVLE,	{FRTp, DS, RA0}},
OP_MASK          6345 arch/powerpc/xmon/ppc-opc.c {"psq_lu",	OP(57),		OP_MASK,     PPCPS,	PPCVLE,		{FRT,PSD,RA,PSW,PSQ}},
OP_MASK          6346 arch/powerpc/xmon/ppc-opc.c {"lfqu",	OP(57),		OP_MASK,     POWER2,	PPCVLE,		{FRT, D, RA0}},
OP_MASK          6662 arch/powerpc/xmon/ppc-opc.c {"psq_st",	OP(60),		OP_MASK,     PPCPS,	PPCVLE,		{FRS,PSD,RA,PSW,PSQ}},
OP_MASK          6663 arch/powerpc/xmon/ppc-opc.c {"stfq",	OP(60),		OP_MASK,     POWER2,	PPCVLE,		{FRS, D, RA}},
OP_MASK          6669 arch/powerpc/xmon/ppc-opc.c {"stfdp",	OP(61),		OP_MASK,     POWER6,	POWER7|PPCVLE,	{FRSp, DS, RA0}},
OP_MASK          6670 arch/powerpc/xmon/ppc-opc.c {"psq_stu",	OP(61),		OP_MASK,     PPCPS,	PPCVLE,		{FRS,PSD,RA,PSW,PSQ}},
OP_MASK          6671 arch/powerpc/xmon/ppc-opc.c {"stfqu",	OP(61),		OP_MASK,     POWER2,	PPCVLE,		{FRS, D, RA}},
OP_MASK          7052 arch/powerpc/xmon/ppc-opc.c {"e_add16i",	OP(7),		OP_MASK,	PPCVLE,	0,		{RT, RA, SI}},
OP_MASK          7053 arch/powerpc/xmon/ppc-opc.c {"e_la",	OP(7),		OP_MASK,	PPCVLE,	0,		{RT, D, RA0}},
OP_MASK          7054 arch/powerpc/xmon/ppc-opc.c {"e_sub16i",	OP(7),		OP_MASK,	PPCVLE,	0,		{RT, RA, NSI}},
OP_MASK          7064 arch/powerpc/xmon/ppc-opc.c {"e_lbz",	OP(12),		OP_MASK,	PPCVLE,	0,		{RT, D, RA0}},
OP_MASK          7065 arch/powerpc/xmon/ppc-opc.c {"e_stb",	OP(13),		OP_MASK,	PPCVLE,	0,		{RT, D, RA0}},
OP_MASK          7066 arch/powerpc/xmon/ppc-opc.c {"e_lha",	OP(14),		OP_MASK,	PPCVLE,	0,		{RT, D, RA0}},
OP_MASK          7078 arch/powerpc/xmon/ppc-opc.c {"e_lwz",	OP(20),		OP_MASK,	PPCVLE,	0,		{RT, D, RA0}},
OP_MASK          7079 arch/powerpc/xmon/ppc-opc.c {"e_stw",	OP(21),		OP_MASK,	PPCVLE,	0,		{RT, D, RA0}},
OP_MASK          7080 arch/powerpc/xmon/ppc-opc.c {"e_lhz",	OP(22),		OP_MASK,	PPCVLE,	0,		{RT, D, RA0}},
OP_MASK          7081 arch/powerpc/xmon/ppc-opc.c {"e_sth",	OP(23),		OP_MASK,	PPCVLE,	0,		{RT, D, RA0}},