OP 55 arch/alpha/include/asm/sfp-machine.h #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ OP 40 arch/h8300/include/asm/bitops.h #define H8300_GEN_BITOP(FNAME, OP) \ OP 48 arch/h8300/include/asm/bitops.h __asm__(OP " %1,%0" : "+WU"(*b_addr) : "i"(nr & 7)); \ OP 50 arch/h8300/include/asm/bitops.h __asm__(OP " %s1,%0" : "+WU"(*b_addr) : "r"(bit)); \ OP 88 arch/h8300/include/asm/bitops.h #define H8300_GEN_TEST_BITOP(FNNAME, OP) \ OP 101 arch/h8300/include/asm/bitops.h OP " %4,%1\n\t" \ OP 110 arch/h8300/include/asm/bitops.h OP " %s3,%1\n\t" \ OP 130 arch/h8300/include/asm/bitops.h OP " %3,%1\n\t" \ OP 136 arch/h8300/include/asm/bitops.h OP " %s3,%1\n\t" \ OP 31 arch/mips/crypto/crc32-mips.c #define _ASM_MACRO_CRC32(OP, SZ, TYPE) \ OP 32 arch/mips/crypto/crc32-mips.c _ASM_MACRO_3R(OP, rt, rs, rt2, \ OP 34 arch/mips/crypto/crc32-mips.c ".error \"invalid operands \\\"" #OP " \\rt,\\rs,\\rt2\\\"\"\n\t" \ OP 1249 arch/mips/include/asm/mipsregs.h #define _ASM_MACRO_0(OP, ENC) \ OP 1250 arch/mips/include/asm/mipsregs.h __asm__(".macro " #OP "\n\t" \ OP 1255 arch/mips/include/asm/mipsregs.h #define _ASM_MACRO_1R1I(OP, R1, I2, ENC) \ OP 1256 arch/mips/include/asm/mipsregs.h __asm__(".macro " #OP " " #R1 ", " #I2 "\n\t" \ OP 1262 arch/mips/include/asm/mipsregs.h #define _ASM_MACRO_2R(OP, R1, R2, ENC) \ OP 1263 arch/mips/include/asm/mipsregs.h __asm__(".macro " #OP " " #R1 ", " #R2 "\n\t" \ OP 1270 arch/mips/include/asm/mipsregs.h #define _ASM_MACRO_3R(OP, R1, R2, R3, ENC) \ OP 1271 arch/mips/include/asm/mipsregs.h __asm__(".macro " #OP " " #R1 ", " #R2 ", " #R3 "\n\t" \ OP 1279 arch/mips/include/asm/mipsregs.h #define _ASM_MACRO_2R_1S(OP, R1, R2, SEL3, ENC) \ OP 1280 arch/mips/include/asm/mipsregs.h __asm__(".macro " #OP " " #R1 ", " #R2 ", " #SEL3 " = 0\n\t" \ OP 40 arch/nds32/include/asm/sfp-machine.h #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ OP 76 arch/powerpc/include/asm/cpm2.h #define mk_cr_cmd(PG, SBC, MCN, OP) \ OP 77 arch/powerpc/include/asm/cpm2.h ((PG << 26) | (SBC << 21) | (MCN << 6) | OP) OP 144 arch/powerpc/include/asm/sfp-machine.h #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ OP 224 arch/powerpc/perf/isa207-common.c dsrc->val |= (val == 1) ? P(OP, LOAD) : P(OP, STORE); OP 2300 arch/powerpc/xmon/ppc-opc.c #define OP_MASK OP (0x3f) OP 2305 arch/powerpc/xmon/ppc-opc.c #define OPTO(x,to) (OP (x) | ((((unsigned long)(to)) & 0x1f) << 21)) OP 2311 arch/powerpc/xmon/ppc-opc.c #define OPL(x,l) (OP (x) | ((((unsigned long)(l)) & 1) << 21)) OP 2316 arch/powerpc/xmon/ppc-opc.c #define OPVUP(x,vup) (OP (x) | ((((unsigned long)(vup)) & 0xff) << 8)) OP 2326 arch/powerpc/xmon/ppc-opc.c #define A(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1) | (((unsigned long)(rc)) & 1)) OP 2342 arch/powerpc/xmon/ppc-opc.c #define B(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 1) << 1) | ((lk) & 1)) OP 2363 arch/powerpc/xmon/ppc-opc.c #define BD15(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 0xf) << 22) | ((lk) & 1)) OP 2379 arch/powerpc/xmon/ppc-opc.c #define BD24(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 1) << 25) | ((lk) & 1)) OP 2417 arch/powerpc/xmon/ppc-opc.c #define CTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7)) OP 2421 arch/powerpc/xmon/ppc-opc.c #define UCTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f)) OP 2428 arch/powerpc/xmon/ppc-opc.c #define DQX(op, xop) (OP (op) | ((xop) & 0x7)) OP 2432 arch/powerpc/xmon/ppc-opc.c #define DSO(op, xop) (OP (op) | ((xop) & 0x3)) OP 2436 arch/powerpc/xmon/ppc-opc.c #define DX(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) OP 2440 arch/powerpc/xmon/ppc-opc.c #define EVSEL(op, xop) (OP (op) | (((unsigned long)(xop)) & 0xff) << 3) OP 2444 arch/powerpc/xmon/ppc-opc.c #define IA16(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f) << 11) OP 2448 arch/powerpc/xmon/ppc-opc.c #define I16A(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f) << 11) OP 2452 arch/powerpc/xmon/ppc-opc.c #define I16L(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f) << 11) OP 2460 arch/powerpc/xmon/ppc-opc.c #define M(op, rc) (OP (op) | ((rc) & 1)) OP 2464 arch/powerpc/xmon/ppc-opc.c #define LI20(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1) << 15) OP 2477 arch/powerpc/xmon/ppc-opc.c #define MD(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x7) << 2) | ((rc) & 1)) OP 2487 arch/powerpc/xmon/ppc-opc.c #define MDS(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0xf) << 1) | ((rc) & 1)) OP 2494 arch/powerpc/xmon/ppc-opc.c #define SC(op, sa, lk) (OP (op) | ((((unsigned long)(sa)) & 1) << 1) | ((lk) & 1)) OP 2498 arch/powerpc/xmon/ppc-opc.c #define SCI8(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 11)) OP 2502 arch/powerpc/xmon/ppc-opc.c #define SCI8BF(op, fop, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 11) | (((fop) & 7) << 23)) OP 2522 arch/powerpc/xmon/ppc-opc.c #define VX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7ff)) OP 2555 arch/powerpc/xmon/ppc-opc.c #define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x03f)) OP 2564 arch/powerpc/xmon/ppc-opc.c #define VXR(op, xop, rc) (OP (op) | (((rc) & 1) << 10) | (((unsigned long)(xop)) & 0x3ff)) OP 2572 arch/powerpc/xmon/ppc-opc.c #define VXASH(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) OP 2576 arch/powerpc/xmon/ppc-opc.c #define X(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1)) OP 2582 arch/powerpc/xmon/ppc-opc.c #define EX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7ff)) OP 2588 arch/powerpc/xmon/ppc-opc.c #define XX2(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 2)) OP 2594 arch/powerpc/xmon/ppc-opc.c #define XX3(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0xff) << 3)) OP 2597 arch/powerpc/xmon/ppc-opc.c #define XX3RC(op, xop, rc) (OP (op) | (((rc) & 1) << 10) | ((((unsigned long)(xop)) & 0x7f) << 3)) OP 2600 arch/powerpc/xmon/ppc-opc.c #define XX4(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3) << 4)) OP 2603 arch/powerpc/xmon/ppc-opc.c #define Z(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 1)) OP 2773 arch/powerpc/xmon/ppc-opc.c #define XFL(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1) | (((unsigned long)(rc)) & 1)) OP 2777 arch/powerpc/xmon/ppc-opc.c #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) OP 2781 arch/powerpc/xmon/ppc-opc.c #define XL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1)) OP 2827 arch/powerpc/xmon/ppc-opc.c (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 1) | ((((unsigned long)(oe)) & 1) << 10) | (((unsigned long)(rc)) & 1)) OP 2835 arch/powerpc/xmon/ppc-opc.c (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1) | (((unsigned long)(rc)) & 1)) OP 2840 arch/powerpc/xmon/ppc-opc.c #define XS(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 2) | (((unsigned long)(rc)) & 1)) OP 2868 arch/powerpc/xmon/ppc-opc.c #define XUC(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f)) OP 2872 arch/powerpc/xmon/ppc-opc.c #define XW(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x3f) << 1) | ((rc) & 1)) OP 2877 arch/powerpc/xmon/ppc-opc.c #define APU(op, xop, rc) (OP (op) | (((unsigned long)(xop)) & 0x3ff) << 1 | ((rc) & 1)) OP 3053 arch/powerpc/xmon/ppc-opc.c {"tdi", OP(2), OP_MASK, PPC64, PPCVLE, {TO, RA, SI}}, OP 3085 arch/powerpc/xmon/ppc-opc.c {"twi", OP(3), OP_MASK, PPCCOM, PPCVLE, {TO, RA, SI}}, OP 3086 arch/powerpc/xmon/ppc-opc.c {"ti", OP(3), OP_MASK, PWRCOM, PPCVLE, {TO, RA, SI}}, OP 3825 arch/powerpc/xmon/ppc-opc.c {"mulli", OP(7), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}}, OP 3826 arch/powerpc/xmon/ppc-opc.c {"muli", OP(7), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}}, OP 3828 arch/powerpc/xmon/ppc-opc.c {"subfic", OP(8), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}}, OP 3829 arch/powerpc/xmon/ppc-opc.c {"sfi", OP(8), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}}, OP 3831 arch/powerpc/xmon/ppc-opc.c {"dozi", OP(9), OP_MASK, M601, PPCVLE, {RT, RA, SI}}, OP 3835 arch/powerpc/xmon/ppc-opc.c {"cmpli", OP(10), OP_MASK, PPC, PPCVLE, {BF, L32OPT, RA, UISIGNOPT}}, OP 3836 arch/powerpc/xmon/ppc-opc.c {"cmpli", OP(10), OP_MASK, PWRCOM, PPC|PPCVLE, {BF, RA, UISIGNOPT}}, OP 3840 arch/powerpc/xmon/ppc-opc.c {"cmpi", OP(11), OP_MASK, PPC, PPCVLE, {BF, L32OPT, RA, SI}}, OP 3841 arch/powerpc/xmon/ppc-opc.c {"cmpi", OP(11), OP_MASK, PWRCOM, PPC|PPCVLE, {BF, RA, SI}}, OP 3843 arch/powerpc/xmon/ppc-opc.c {"addic", OP(12), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}}, OP 3844 arch/powerpc/xmon/ppc-opc.c {"ai", OP(12), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}}, OP 3845 arch/powerpc/xmon/ppc-opc.c {"subic", OP(12), OP_MASK, PPCCOM, PPCVLE, {RT, RA, NSI}}, OP 3847 arch/powerpc/xmon/ppc-opc.c {"addic.", OP(13), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}}, OP 3848 arch/powerpc/xmon/ppc-opc.c {"ai.", OP(13), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}}, OP 3849 arch/powerpc/xmon/ppc-opc.c {"subic.", OP(13), OP_MASK, PPCCOM, PPCVLE, {RT, RA, NSI}}, OP 3851 arch/powerpc/xmon/ppc-opc.c {"li", OP(14), DRA_MASK, PPCCOM, PPCVLE, {RT, SI}}, OP 3852 arch/powerpc/xmon/ppc-opc.c {"lil", OP(14), DRA_MASK, PWRCOM, PPCVLE, {RT, SI}}, OP 3853 arch/powerpc/xmon/ppc-opc.c {"addi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SI}}, OP 3854 arch/powerpc/xmon/ppc-opc.c {"cal", OP(14), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}}, OP 3855 arch/powerpc/xmon/ppc-opc.c {"subi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSI}}, OP 3856 arch/powerpc/xmon/ppc-opc.c {"la", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, D, RA0}}, OP 3858 arch/powerpc/xmon/ppc-opc.c {"lis", OP(15), DRA_MASK, PPCCOM, PPCVLE, {RT, SISIGNOPT}}, OP 3859 arch/powerpc/xmon/ppc-opc.c {"liu", OP(15), DRA_MASK, PWRCOM, PPCVLE, {RT, SISIGNOPT}}, OP 3860 arch/powerpc/xmon/ppc-opc.c {"addis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SISIGNOPT}}, OP 3861 arch/powerpc/xmon/ppc-opc.c {"cau", OP(15), OP_MASK, PWRCOM, PPCVLE, {RT, RA0, SISIGNOPT}}, OP 3862 arch/powerpc/xmon/ppc-opc.c {"subis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSISIGNOPT}}, OP 4612 arch/powerpc/xmon/ppc-opc.c {"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}}, OP 4613 arch/powerpc/xmon/ppc-opc.c {"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}}, OP 4614 arch/powerpc/xmon/ppc-opc.c {"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}}, OP 4616 arch/powerpc/xmon/ppc-opc.c {"oris", OP(25), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}}, OP 4617 arch/powerpc/xmon/ppc-opc.c {"oriu", OP(25), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}}, OP 4619 arch/powerpc/xmon/ppc-opc.c {"xnop", OP(26), 0xffffffff, PPCCOM, PPCVLE, {0}}, OP 4620 arch/powerpc/xmon/ppc-opc.c {"xori", OP(26), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}}, OP 4621 arch/powerpc/xmon/ppc-opc.c {"xoril", OP(26), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}}, OP 4623 arch/powerpc/xmon/ppc-opc.c {"xoris", OP(27), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}}, OP 4624 arch/powerpc/xmon/ppc-opc.c {"xoriu", OP(27), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}}, OP 4626 arch/powerpc/xmon/ppc-opc.c {"andi.", OP(28), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}}, OP 4627 arch/powerpc/xmon/ppc-opc.c {"andil.", OP(28), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}}, OP 4629 arch/powerpc/xmon/ppc-opc.c {"andis.", OP(29), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}}, OP 4630 arch/powerpc/xmon/ppc-opc.c {"andiu.", OP(29), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}}, OP 6284 arch/powerpc/xmon/ppc-opc.c {"lwz", OP(32), OP_MASK, PPCCOM, PPCVLE, {RT, D, RA0}}, OP 6285 arch/powerpc/xmon/ppc-opc.c {"l", OP(32), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}}, OP 6287 arch/powerpc/xmon/ppc-opc.c {"lwzu", OP(33), OP_MASK, PPCCOM, PPCVLE, {RT, D, RAL}}, OP 6288 arch/powerpc/xmon/ppc-opc.c {"lu", OP(33), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}}, OP 6290 arch/powerpc/xmon/ppc-opc.c {"lbz", OP(34), OP_MASK, COM, PPCVLE, {RT, D, RA0}}, OP 6292 arch/powerpc/xmon/ppc-opc.c {"lbzu", OP(35), OP_MASK, COM, PPCVLE, {RT, D, RAL}}, OP 6294 arch/powerpc/xmon/ppc-opc.c {"stw", OP(36), OP_MASK, PPCCOM, PPCVLE, {RS, D, RA0}}, OP 6295 arch/powerpc/xmon/ppc-opc.c {"st", OP(36), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}}, OP 6297 arch/powerpc/xmon/ppc-opc.c {"stwu", OP(37), OP_MASK, PPCCOM, PPCVLE, {RS, D, RAS}}, OP 6298 arch/powerpc/xmon/ppc-opc.c {"stu", OP(37), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}}, OP 6300 arch/powerpc/xmon/ppc-opc.c {"stb", OP(38), OP_MASK, COM, PPCVLE, {RS, D, RA0}}, OP 6302 arch/powerpc/xmon/ppc-opc.c {"stbu", OP(39), OP_MASK, COM, PPCVLE, {RS, D, RAS}}, OP 6304 arch/powerpc/xmon/ppc-opc.c {"lhz", OP(40), OP_MASK, COM, PPCVLE, {RT, D, RA0}}, OP 6306 arch/powerpc/xmon/ppc-opc.c {"lhzu", OP(41), OP_MASK, COM, PPCVLE, {RT, D, RAL}}, OP 6308 arch/powerpc/xmon/ppc-opc.c {"lha", OP(42), OP_MASK, COM, PPCVLE, {RT, D, RA0}}, OP 6310 arch/powerpc/xmon/ppc-opc.c {"lhau", OP(43), OP_MASK, COM, PPCVLE, {RT, D, RAL}}, OP 6312 arch/powerpc/xmon/ppc-opc.c {"sth", OP(44), OP_MASK, COM, PPCVLE, {RS, D, RA0}}, OP 6314 arch/powerpc/xmon/ppc-opc.c {"sthu", OP(45), OP_MASK, COM, PPCVLE, {RS, D, RAS}}, OP 6316 arch/powerpc/xmon/ppc-opc.c {"lmw", OP(46), OP_MASK, PPCCOM, PPCVLE, {RT, D, RAM}}, OP 6317 arch/powerpc/xmon/ppc-opc.c {"lm", OP(46), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}}, OP 6319 arch/powerpc/xmon/ppc-opc.c {"stmw", OP(47), OP_MASK, PPCCOM, PPCVLE, {RS, D, RA0}}, OP 6320 arch/powerpc/xmon/ppc-opc.c {"stm", OP(47), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}}, OP 6322 arch/powerpc/xmon/ppc-opc.c {"lfs", OP(48), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RA0}}, OP 6324 arch/powerpc/xmon/ppc-opc.c {"lfsu", OP(49), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RAS}}, OP 6326 arch/powerpc/xmon/ppc-opc.c {"lfd", OP(50), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RA0}}, OP 6328 arch/powerpc/xmon/ppc-opc.c {"lfdu", OP(51), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RAS}}, OP 6330 arch/powerpc/xmon/ppc-opc.c {"stfs", OP(52), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RA0}}, OP 6332 arch/powerpc/xmon/ppc-opc.c {"stfsu", OP(53), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}}, OP 6334 arch/powerpc/xmon/ppc-opc.c {"stfd", OP(54), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RA0}}, OP 6336 arch/powerpc/xmon/ppc-opc.c {"stfdu", OP(55), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}}, OP 6338 arch/powerpc/xmon/ppc-opc.c {"lq", OP(56), OP_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}}, OP 6339 arch/powerpc/xmon/ppc-opc.c {"psq_l", OP(56), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}}, OP 6340 arch/powerpc/xmon/ppc-opc.c {"lfq", OP(56), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}}, OP 6344 arch/powerpc/xmon/ppc-opc.c {"lfdp", OP(57), OP_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}}, OP 6345 arch/powerpc/xmon/ppc-opc.c {"psq_lu", OP(57), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}}, OP 6346 arch/powerpc/xmon/ppc-opc.c {"lfqu", OP(57), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}}, OP 6662 arch/powerpc/xmon/ppc-opc.c {"psq_st", OP(60), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}}, OP 6663 arch/powerpc/xmon/ppc-opc.c {"stfq", OP(60), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}}, OP 6669 arch/powerpc/xmon/ppc-opc.c {"stfdp", OP(61), OP_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}}, OP 6670 arch/powerpc/xmon/ppc-opc.c {"psq_stu", OP(61), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}}, OP 6671 arch/powerpc/xmon/ppc-opc.c {"stfqu", OP(61), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}}, OP 7052 arch/powerpc/xmon/ppc-opc.c {"e_add16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, SI}}, OP 7053 arch/powerpc/xmon/ppc-opc.c {"e_la", OP(7), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, OP 7054 arch/powerpc/xmon/ppc-opc.c {"e_sub16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, NSI}}, OP 7064 arch/powerpc/xmon/ppc-opc.c {"e_lbz", OP(12), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, OP 7065 arch/powerpc/xmon/ppc-opc.c {"e_stb", OP(13), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, OP 7066 arch/powerpc/xmon/ppc-opc.c {"e_lha", OP(14), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, OP 7078 arch/powerpc/xmon/ppc-opc.c {"e_lwz", OP(20), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, OP 7079 arch/powerpc/xmon/ppc-opc.c {"e_stw", OP(21), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, OP 7080 arch/powerpc/xmon/ppc-opc.c {"e_lhz", OP(22), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, OP 7081 arch/powerpc/xmon/ppc-opc.c {"e_sth", OP(23), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, OP 45 arch/sh/include/asm/sfp-machine.h #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ OP 76 arch/sh/math-emu/math.c #define CMP(OP) ({ int r; BOTH_PRmn(OP##_X,r); r; }) OP 99 arch/sh/math-emu/math.c #define ARITH_X(SZ,OP,M,N) do{ \ OP 102 arch/sh/math-emu/math.c FP_##OP##_##SZ(Fr, Fn, Fm); \ OP 61 arch/sparc/include/asm/sfp-machine_32.h #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ OP 59 arch/sparc/include/asm/sfp-machine_64.h #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ OP 32 arch/sparc/net/bpf_jit_comp_32.c #define F1(X) OP(X) OP 33 arch/sparc/net/bpf_jit_comp_32.c #define F2(X, Y) (OP(X) | OP2(Y)) OP 34 arch/sparc/net/bpf_jit_comp_32.c #define F3(X, Y) (OP(X) | OP3(Y)) OP 62 arch/sparc/net/bpf_jit_comp_64.c #define F1(X) OP(X) OP 63 arch/sparc/net/bpf_jit_comp_64.c #define F2(X, Y) (OP(X) | OP2(Y)) OP 64 arch/sparc/net/bpf_jit_comp_64.c #define F3(X, Y) (OP(X) | OP3(Y)) OP 55 arch/x86/events/intel/ds.c #define OP_LH (P(OP, LOAD) | P(LVL, HIT)) OP 62 arch/x86/events/intel/ds.c P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA),/* 0x00:ukn L3 */ OP 102 arch/x86/events/intel/ds.c u64 val = P(OP, STORE) | P(SNOOP, NA) | P(LVL, L1) | P(TLB, L2); OP 377 crypto/seed.c OP(x1, x2, x3, x4, 0); OP 378 crypto/seed.c OP(x3, x4, x1, x2, 2); OP 379 crypto/seed.c OP(x1, x2, x3, x4, 4); OP 380 crypto/seed.c OP(x3, x4, x1, x2, 6); OP 381 crypto/seed.c OP(x1, x2, x3, x4, 8); OP 382 crypto/seed.c OP(x3, x4, x1, x2, 10); OP 383 crypto/seed.c OP(x1, x2, x3, x4, 12); OP 384 crypto/seed.c OP(x3, x4, x1, x2, 14); OP 385 crypto/seed.c OP(x1, x2, x3, x4, 16); OP 386 crypto/seed.c OP(x3, x4, x1, x2, 18); OP 387 crypto/seed.c OP(x1, x2, x3, x4, 20); OP 388 crypto/seed.c OP(x3, x4, x1, x2, 22); OP 389 crypto/seed.c OP(x1, x2, x3, x4, 24); OP 390 crypto/seed.c OP(x3, x4, x1, x2, 26); OP 391 crypto/seed.c OP(x1, x2, x3, x4, 28); OP 392 crypto/seed.c OP(x3, x4, x1, x2, 30); OP 415 crypto/seed.c OP(x1, x2, x3, x4, 30); OP 416 crypto/seed.c OP(x3, x4, x1, x2, 28); OP 417 crypto/seed.c OP(x1, x2, x3, x4, 26); OP 418 crypto/seed.c OP(x3, x4, x1, x2, 24); OP 419 crypto/seed.c OP(x1, x2, x3, x4, 22); OP 420 crypto/seed.c OP(x3, x4, x1, x2, 20); OP 421 crypto/seed.c OP(x1, x2, x3, x4, 18); OP 422 crypto/seed.c OP(x3, x4, x1, x2, 16); OP 423 crypto/seed.c OP(x1, x2, x3, x4, 14); OP 424 crypto/seed.c OP(x3, x4, x1, x2, 12); OP 425 crypto/seed.c OP(x1, x2, x3, x4, 10); OP 426 crypto/seed.c OP(x3, x4, x1, x2, 8); OP 427 crypto/seed.c OP(x1, x2, x3, x4, 6); OP 428 crypto/seed.c OP(x3, x4, x1, x2, 4); OP 429 crypto/seed.c OP(x1, x2, x3, x4, 2); OP 430 crypto/seed.c OP(x3, x4, x1, x2, 0); OP 67 drivers/cpufreq/pxa3xx-cpufreq.c OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */ OP 68 drivers/cpufreq/pxa3xx-cpufreq.c OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */ OP 69 drivers/cpufreq/pxa3xx-cpufreq.c OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */ OP 70 drivers/cpufreq/pxa3xx-cpufreq.c OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */ OP 75 drivers/cpufreq/pxa3xx-cpufreq.c OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */ OP 76 drivers/cpufreq/pxa3xx-cpufreq.c OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */ OP 77 drivers/cpufreq/pxa3xx-cpufreq.c OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */ OP 78 drivers/cpufreq/pxa3xx-cpufreq.c OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */ OP 79 drivers/cpufreq/pxa3xx-cpufreq.c OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */ OP 101 drivers/cpufreq/speedstep-centrino.c OP(600, 844), OP 102 drivers/cpufreq/speedstep-centrino.c OP(800, 988), OP 103 drivers/cpufreq/speedstep-centrino.c OP(900, 1004), OP 110 drivers/cpufreq/speedstep-centrino.c OP(600, 844), OP 111 drivers/cpufreq/speedstep-centrino.c OP(800, 972), OP 112 drivers/cpufreq/speedstep-centrino.c OP(900, 988), OP 113 drivers/cpufreq/speedstep-centrino.c OP(1000, 1004), OP 120 drivers/cpufreq/speedstep-centrino.c OP( 600, 956), OP 121 drivers/cpufreq/speedstep-centrino.c OP( 800, 1020), OP 122 drivers/cpufreq/speedstep-centrino.c OP( 900, 1100), OP 123 drivers/cpufreq/speedstep-centrino.c OP(1000, 1164), OP 124 drivers/cpufreq/speedstep-centrino.c OP(1100, 1180), OP 132 drivers/cpufreq/speedstep-centrino.c OP( 600, 956), OP 133 drivers/cpufreq/speedstep-centrino.c OP( 800, 1004), OP 134 drivers/cpufreq/speedstep-centrino.c OP( 900, 1020), OP 135 drivers/cpufreq/speedstep-centrino.c OP(1000, 1100), OP 136 drivers/cpufreq/speedstep-centrino.c OP(1100, 1164), OP 137 drivers/cpufreq/speedstep-centrino.c OP(1200, 1180), OP 144 drivers/cpufreq/speedstep-centrino.c OP( 600, 956), OP 145 drivers/cpufreq/speedstep-centrino.c OP( 800, 1260), OP 146 drivers/cpufreq/speedstep-centrino.c OP(1000, 1292), OP 147 drivers/cpufreq/speedstep-centrino.c OP(1200, 1356), OP 148 drivers/cpufreq/speedstep-centrino.c OP(1300, 1388), OP 155 drivers/cpufreq/speedstep-centrino.c OP( 600, 956), OP 156 drivers/cpufreq/speedstep-centrino.c OP( 800, 1180), OP 157 drivers/cpufreq/speedstep-centrino.c OP(1000, 1308), OP 158 drivers/cpufreq/speedstep-centrino.c OP(1200, 1436), OP 159 drivers/cpufreq/speedstep-centrino.c OP(1400, 1484), OP 166 drivers/cpufreq/speedstep-centrino.c OP( 600, 956), OP 167 drivers/cpufreq/speedstep-centrino.c OP( 800, 1116), OP 168 drivers/cpufreq/speedstep-centrino.c OP(1000, 1228), OP 169 drivers/cpufreq/speedstep-centrino.c OP(1200, 1356), OP 170 drivers/cpufreq/speedstep-centrino.c OP(1400, 1452), OP 171 drivers/cpufreq/speedstep-centrino.c OP(1500, 1484), OP 178 drivers/cpufreq/speedstep-centrino.c OP( 600, 956), OP 179 drivers/cpufreq/speedstep-centrino.c OP( 800, 1036), OP 180 drivers/cpufreq/speedstep-centrino.c OP(1000, 1164), OP 181 drivers/cpufreq/speedstep-centrino.c OP(1200, 1276), OP 182 drivers/cpufreq/speedstep-centrino.c OP(1400, 1420), OP 183 drivers/cpufreq/speedstep-centrino.c OP(1600, 1484), OP 190 drivers/cpufreq/speedstep-centrino.c OP( 600, 956), OP 191 drivers/cpufreq/speedstep-centrino.c OP( 800, 1004), OP 192 drivers/cpufreq/speedstep-centrino.c OP(1000, 1116), OP 193 drivers/cpufreq/speedstep-centrino.c OP(1200, 1228), OP 194 drivers/cpufreq/speedstep-centrino.c OP(1400, 1308), OP 195 drivers/cpufreq/speedstep-centrino.c OP(1700, 1484), OP 303 drivers/gpu/drm/i915/i915_utils.h #define __wait_for(OP, COND, US, Wmin, Wmax) ({ \ OP 310 drivers/gpu/drm/i915/i915_utils.h OP; \ OP 140 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_LAST): OP 141 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_ONLY): OP 145 drivers/infiniband/hw/hfi1/rc.c case OP(ATOMIC_ACKNOWLEDGE): OP 164 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_ONLY): OP 165 drivers/infiniband/hw/hfi1/rc.c case OP(ACKNOWLEDGE): OP 180 drivers/infiniband/hw/hfi1/rc.c if (e->opcode == OP(RDMA_READ_REQUEST)) { OP 205 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST); OP 207 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY); OP 257 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE); OP 268 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_FIRST): OP 269 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE); OP 271 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_MIDDLE): OP 283 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST); OP 344 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE); OP 363 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST); OP 377 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(SEND_ONLY); OP 388 drivers/infiniband/hw/hfi1/rc.c bth0 = OP(ACKNOWLEDGE) << 24; OP 409 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(ACKNOWLEDGE); OP 601 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_FIRST); OP 606 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_ONLY); OP 608 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE); OP 613 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE); OP 643 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_WRITE_FIRST); OP 648 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_WRITE_ONLY); OP 651 drivers/infiniband/hw/hfi1/rc.c OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); OP 789 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_READ_REQUEST); OP 891 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(COMPARE_SWAP); OP 897 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(FETCH_ADD); OP 938 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_FIRST): OP 950 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_FIRST): OP 951 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_MIDDLE); OP 953 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_MIDDLE): OP 963 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_LAST); OP 965 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); OP 970 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_LAST_WITH_INVALIDATE); OP 983 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_LAST): OP 995 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_FIRST): OP 996 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_WRITE_MIDDLE); OP 998 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_MIDDLE): OP 1008 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_WRITE_LAST); OP 1010 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); OP 1023 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_MIDDLE): OP 1040 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_READ_REQUEST); OP 1143 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_READ_REQUEST); OP 1302 drivers/infiniband/hw/hfi1/rc.c bth0 = pkey | (OP(ACKNOWLEDGE) << 24); OP 1360 drivers/infiniband/hw/hfi1/rc.c bth0 = pkey | (OP(ACKNOWLEDGE) << 24); OP 1519 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_LAST); OP 1545 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_LAST); OP 1561 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_READ_RESPONSE_FIRST); OP 1566 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_READ_RESPONSE_LAST); OP 1574 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE); OP 1586 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_LAST); OP 1722 drivers/infiniband/hw/hfi1/rc.c if ((opcode >= OP(RDMA_READ_RESPONSE_FIRST) && OP 1723 drivers/infiniband/hw/hfi1/rc.c opcode <= OP(ATOMIC_ACKNOWLEDGE)) || OP 1751 drivers/infiniband/hw/hfi1/rc.c if ((opcode >= OP(RDMA_READ_RESPONSE_FIRST) && OP 1752 drivers/infiniband/hw/hfi1/rc.c opcode <= OP(ATOMIC_ACKNOWLEDGE)) || OP 1931 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_LAST); OP 2044 drivers/infiniband/hw/hfi1/rc.c opcode == OP(RDMA_READ_RESPONSE_ONLY) && OP 2059 drivers/infiniband/hw/hfi1/rc.c (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || OP 2064 drivers/infiniband/hw/hfi1/rc.c (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0)) || OP 2182 drivers/infiniband/hw/hfi1/rc.c qp->s_state = OP(SEND_LAST); OP 2377 drivers/infiniband/hw/hfi1/rc.c if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { OP 2401 drivers/infiniband/hw/hfi1/rc.c case OP(ACKNOWLEDGE): OP 2402 drivers/infiniband/hw/hfi1/rc.c case OP(ATOMIC_ACKNOWLEDGE): OP 2403 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_FIRST): OP 2405 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(ATOMIC_ACKNOWLEDGE)) OP 2410 drivers/infiniband/hw/hfi1/rc.c opcode != OP(RDMA_READ_RESPONSE_FIRST)) OP 2424 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_MIDDLE): OP 2446 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) OP 2460 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_ONLY): OP 2480 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_RESPONSE_LAST): OP 2501 drivers/infiniband/hw/hfi1/rc.c OP(RDMA_READ_RESPONSE_LAST), 0, rcd); OP 2610 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_REQUEST): { OP 2619 drivers/infiniband/hw/hfi1/rc.c if (!e || e->opcode != OP(RDMA_READ_REQUEST)) OP 2658 drivers/infiniband/hw/hfi1/rc.c case OP(COMPARE_SWAP): OP 2659 drivers/infiniband/hw/hfi1/rc.c case OP(FETCH_ADD): { OP 2700 drivers/infiniband/hw/hfi1/rc.c qp->s_ack_state = OP(ACKNOWLEDGE); OP 2842 drivers/infiniband/hw/hfi1/rc.c if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && OP 2843 drivers/infiniband/hw/hfi1/rc.c opcode <= OP(ATOMIC_ACKNOWLEDGE)) { OP 2858 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_FIRST): OP 2859 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_MIDDLE): OP 2860 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(SEND_MIDDLE) || OP 2861 drivers/infiniband/hw/hfi1/rc.c opcode == OP(SEND_LAST) || OP 2862 drivers/infiniband/hw/hfi1/rc.c opcode == OP(SEND_LAST_WITH_IMMEDIATE) || OP 2863 drivers/infiniband/hw/hfi1/rc.c opcode == OP(SEND_LAST_WITH_INVALIDATE)) OP 2867 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_FIRST): OP 2868 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_MIDDLE): OP 2869 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(RDMA_WRITE_MIDDLE) || OP 2870 drivers/infiniband/hw/hfi1/rc.c opcode == OP(RDMA_WRITE_LAST) || OP 2871 drivers/infiniband/hw/hfi1/rc.c opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) OP 2876 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(SEND_MIDDLE) || OP 2877 drivers/infiniband/hw/hfi1/rc.c opcode == OP(SEND_LAST) || OP 2878 drivers/infiniband/hw/hfi1/rc.c opcode == OP(SEND_LAST_WITH_IMMEDIATE) || OP 2879 drivers/infiniband/hw/hfi1/rc.c opcode == OP(SEND_LAST_WITH_INVALIDATE) || OP 2880 drivers/infiniband/hw/hfi1/rc.c opcode == OP(RDMA_WRITE_MIDDLE) || OP 2881 drivers/infiniband/hw/hfi1/rc.c opcode == OP(RDMA_WRITE_LAST) || OP 2882 drivers/infiniband/hw/hfi1/rc.c opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) OP 2897 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_FIRST): OP 2905 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_MIDDLE): OP 2906 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_MIDDLE): OP 2922 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): OP 2931 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_ONLY): OP 2932 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_ONLY_WITH_IMMEDIATE): OP 2933 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_ONLY_WITH_INVALIDATE): OP 2940 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(SEND_ONLY)) OP 2942 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(SEND_ONLY_WITH_INVALIDATE)) OP 2945 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_LAST_WITH_IMMEDIATE): OP 2950 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_LAST_WITH_INVALIDATE): OP 2958 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_LAST): OP 2961 drivers/infiniband/hw/hfi1/rc.c case OP(SEND_LAST): OP 2982 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || OP 2983 drivers/infiniband/hw/hfi1/rc.c opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) OP 3011 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_ONLY): OP 3014 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_FIRST): OP 3015 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): OP 3041 drivers/infiniband/hw/hfi1/rc.c if (opcode == OP(RDMA_WRITE_FIRST)) OP 3043 drivers/infiniband/hw/hfi1/rc.c else if (opcode == OP(RDMA_WRITE_ONLY)) OP 3057 drivers/infiniband/hw/hfi1/rc.c case OP(RDMA_READ_REQUEST): { OP 3125 drivers/infiniband/hw/hfi1/rc.c case OP(COMPARE_SWAP): OP 3126 drivers/infiniband/hw/hfi1/rc.c case OP(FETCH_ADD): { OP 3129 drivers/infiniband/hw/hfi1/rc.c bool opfn = opcode == OP(COMPARE_SWAP) && OP 3167 drivers/infiniband/hw/hfi1/rc.c e->atomic_data = (opcode == OP(FETCH_ADD)) ? OP 22 drivers/infiniband/hw/hfi1/rc.h qp->s_ack_state = OP(ACKNOWLEDGE); OP 2185 drivers/infiniband/hw/hfi1/tid_rdma.c qp->s_ack_state = OP(ACKNOWLEDGE); OP 5462 drivers/infiniband/hw/hfi1/tid_rdma.c e->opcode == OP(RDMA_READ_REQUEST)) && OP 298 drivers/infiniband/hw/hfi1/trace.c case OP(RC, SEND_LAST_WITH_IMMEDIATE): OP 299 drivers/infiniband/hw/hfi1/trace.c case OP(UC, SEND_LAST_WITH_IMMEDIATE): OP 300 drivers/infiniband/hw/hfi1/trace.c case OP(RC, SEND_ONLY_WITH_IMMEDIATE): OP 301 drivers/infiniband/hw/hfi1/trace.c case OP(UC, SEND_ONLY_WITH_IMMEDIATE): OP 302 drivers/infiniband/hw/hfi1/trace.c case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE): OP 303 drivers/infiniband/hw/hfi1/trace.c case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE): OP 308 drivers/infiniband/hw/hfi1/trace.c case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE): OP 309 drivers/infiniband/hw/hfi1/trace.c case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE): OP 317 drivers/infiniband/hw/hfi1/trace.c case OP(RC, RDMA_READ_REQUEST): OP 318 drivers/infiniband/hw/hfi1/trace.c case OP(RC, RDMA_WRITE_FIRST): OP 319 drivers/infiniband/hw/hfi1/trace.c case OP(UC, RDMA_WRITE_FIRST): OP 320 drivers/infiniband/hw/hfi1/trace.c case OP(RC, RDMA_WRITE_ONLY): OP 321 drivers/infiniband/hw/hfi1/trace.c case OP(UC, RDMA_WRITE_ONLY): OP 327 drivers/infiniband/hw/hfi1/trace.c case OP(RC, RDMA_READ_RESPONSE_FIRST): OP 328 drivers/infiniband/hw/hfi1/trace.c case OP(RC, RDMA_READ_RESPONSE_LAST): OP 329 drivers/infiniband/hw/hfi1/trace.c case OP(RC, RDMA_READ_RESPONSE_ONLY): OP 330 drivers/infiniband/hw/hfi1/trace.c case OP(RC, ACKNOWLEDGE): OP 335 drivers/infiniband/hw/hfi1/trace.c case OP(TID_RDMA, WRITE_REQ): OP 345 drivers/infiniband/hw/hfi1/trace.c case OP(TID_RDMA, WRITE_RESP): OP 360 drivers/infiniband/hw/hfi1/trace.c case OP(TID_RDMA, WRITE_DATA_LAST): OP 361 drivers/infiniband/hw/hfi1/trace.c case OP(TID_RDMA, WRITE_DATA): OP 374 drivers/infiniband/hw/hfi1/trace.c case OP(TID_RDMA, READ_REQ): OP 386 drivers/infiniband/hw/hfi1/trace.c case OP(TID_RDMA, READ_RESP): OP 406 drivers/infiniband/hw/hfi1/trace.c case OP(TID_RDMA, ACK): OP 422 drivers/infiniband/hw/hfi1/trace.c case OP(TID_RDMA, RESYNC): OP 429 drivers/infiniband/hw/hfi1/trace.c case OP(RC, ATOMIC_ACKNOWLEDGE): OP 437 drivers/infiniband/hw/hfi1/trace.c case OP(RC, COMPARE_SWAP): OP 438 drivers/infiniband/hw/hfi1/trace.c case OP(RC, FETCH_ADD): OP 446 drivers/infiniband/hw/hfi1/trace.c case OP(UD, SEND_ONLY): OP 447 drivers/infiniband/hw/hfi1/trace.c case OP(UD, SEND_ONLY_WITH_IMMEDIATE): OP 453 drivers/infiniband/hw/hfi1/trace.c case OP(RC, SEND_LAST_WITH_INVALIDATE): OP 454 drivers/infiniband/hw/hfi1/trace.c case OP(RC, SEND_ONLY_WITH_INVALIDATE): OP 163 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(SEND_FIRST); OP 168 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(SEND_ONLY); OP 171 drivers/infiniband/hw/hfi1/uc.c OP(SEND_ONLY_WITH_IMMEDIATE); OP 192 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(RDMA_WRITE_FIRST); OP 197 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(RDMA_WRITE_ONLY); OP 200 drivers/infiniband/hw/hfi1/uc.c OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); OP 217 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_FIRST): OP 218 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(SEND_MIDDLE); OP 220 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_MIDDLE): OP 228 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(SEND_LAST); OP 230 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); OP 242 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_FIRST): OP 243 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(RDMA_WRITE_MIDDLE); OP 245 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_MIDDLE): OP 253 drivers/infiniband/hw/hfi1/uc.c qp->s_state = OP(RDMA_WRITE_LAST); OP 256 drivers/infiniband/hw/hfi1/uc.c OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); OP 336 drivers/infiniband/hw/hfi1/uc.c if (qp->r_state == OP(SEND_FIRST) || OP 337 drivers/infiniband/hw/hfi1/uc.c qp->r_state == OP(SEND_MIDDLE)) { OP 343 drivers/infiniband/hw/hfi1/uc.c qp->r_state = OP(SEND_LAST); OP 345 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_FIRST): OP 346 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_ONLY): OP 347 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_ONLY_WITH_IMMEDIATE): OP 350 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_FIRST): OP 351 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_ONLY): OP 352 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): OP 362 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_FIRST): OP 363 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_MIDDLE): OP 364 drivers/infiniband/hw/hfi1/uc.c if (opcode == OP(SEND_MIDDLE) || OP 365 drivers/infiniband/hw/hfi1/uc.c opcode == OP(SEND_LAST) || OP 366 drivers/infiniband/hw/hfi1/uc.c opcode == OP(SEND_LAST_WITH_IMMEDIATE)) OP 370 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_FIRST): OP 371 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_MIDDLE): OP 372 drivers/infiniband/hw/hfi1/uc.c if (opcode == OP(RDMA_WRITE_MIDDLE) || OP 373 drivers/infiniband/hw/hfi1/uc.c opcode == OP(RDMA_WRITE_LAST) || OP 374 drivers/infiniband/hw/hfi1/uc.c opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) OP 379 drivers/infiniband/hw/hfi1/uc.c if (opcode == OP(SEND_FIRST) || OP 380 drivers/infiniband/hw/hfi1/uc.c opcode == OP(SEND_ONLY) || OP 381 drivers/infiniband/hw/hfi1/uc.c opcode == OP(SEND_ONLY_WITH_IMMEDIATE) || OP 382 drivers/infiniband/hw/hfi1/uc.c opcode == OP(RDMA_WRITE_FIRST) || OP 383 drivers/infiniband/hw/hfi1/uc.c opcode == OP(RDMA_WRITE_ONLY) || OP 384 drivers/infiniband/hw/hfi1/uc.c opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) OP 394 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_FIRST): OP 395 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_ONLY): OP 396 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_ONLY_WITH_IMMEDIATE): OP 413 drivers/infiniband/hw/hfi1/uc.c if (opcode == OP(SEND_ONLY)) OP 415 drivers/infiniband/hw/hfi1/uc.c else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE)) OP 418 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_MIDDLE): OP 433 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_LAST_WITH_IMMEDIATE): OP 438 drivers/infiniband/hw/hfi1/uc.c case OP(SEND_LAST): OP 482 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_FIRST): OP 483 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_ONLY): OP 484 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */ OP 512 drivers/infiniband/hw/hfi1/uc.c if (opcode == OP(RDMA_WRITE_ONLY)) { OP 514 drivers/infiniband/hw/hfi1/uc.c } else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) { OP 519 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_MIDDLE): OP 529 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): OP 557 drivers/infiniband/hw/hfi1/uc.c case OP(RDMA_WRITE_LAST): OP 79 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_LAST): OP 80 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_ONLY): OP 87 drivers/infiniband/hw/qib/qib_rc.c case OP(ATOMIC_ACKNOWLEDGE): OP 96 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_ONLY): OP 97 drivers/infiniband/hw/qib/qib_rc.c case OP(ACKNOWLEDGE): OP 106 drivers/infiniband/hw/qib/qib_rc.c if (e->opcode == OP(RDMA_READ_REQUEST)) { OP 127 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST); OP 129 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY); OP 140 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE); OP 150 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_FIRST): OP 151 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE); OP 153 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_MIDDLE): OP 164 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST); OP 180 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(SEND_ONLY); OP 192 drivers/infiniband/hw/qib/qib_rc.c bth0 = OP(ACKNOWLEDGE) << 24; OP 202 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(ACKNOWLEDGE); OP 319 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_FIRST); OP 324 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_ONLY); OP 326 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE); OP 354 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_WRITE_FIRST); OP 359 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_WRITE_ONLY); OP 361 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); OP 395 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_READ_REQUEST); OP 421 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(COMPARE_SWAP); OP 427 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(FETCH_ADD); OP 463 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_FIRST): OP 475 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_FIRST): OP 476 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_MIDDLE); OP 478 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_MIDDLE): OP 487 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_LAST); OP 489 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); OP 502 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_LAST): OP 514 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_FIRST): OP 515 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_WRITE_MIDDLE); OP 517 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_MIDDLE): OP 526 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_WRITE_LAST); OP 528 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); OP 541 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_MIDDLE): OP 557 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_READ_REQUEST); OP 636 drivers/infiniband/hw/qib/qib_rc.c bth0 = qib_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24); OP 748 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_LAST); OP 771 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_LAST); OP 785 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_READ_RESPONSE_FIRST); OP 790 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_READ_RESPONSE_LAST); OP 794 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE); OP 802 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_LAST); OP 898 drivers/infiniband/hw/qib/qib_rc.c if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && OP 899 drivers/infiniband/hw/qib/qib_rc.c opcode <= OP(ATOMIC_ACKNOWLEDGE)) { OP 982 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_LAST); OP 1040 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(RDMA_READ_RESPONSE_ONLY) && OP 1055 drivers/infiniband/hw/qib/qib_rc.c (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || OP 1058 drivers/infiniband/hw/qib/qib_rc.c (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) { OP 1122 drivers/infiniband/hw/qib/qib_rc.c qp->s_state = OP(SEND_LAST); OP 1284 drivers/infiniband/hw/qib/qib_rc.c if (opcode != OP(RDMA_READ_RESPONSE_MIDDLE)) { OP 1319 drivers/infiniband/hw/qib/qib_rc.c if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { OP 1343 drivers/infiniband/hw/qib/qib_rc.c case OP(ACKNOWLEDGE): OP 1344 drivers/infiniband/hw/qib/qib_rc.c case OP(ATOMIC_ACKNOWLEDGE): OP 1345 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_FIRST): OP 1347 drivers/infiniband/hw/qib/qib_rc.c if (opcode == OP(ATOMIC_ACKNOWLEDGE)) OP 1352 drivers/infiniband/hw/qib/qib_rc.c opcode != OP(RDMA_READ_RESPONSE_FIRST)) OP 1367 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_MIDDLE): OP 1389 drivers/infiniband/hw/qib/qib_rc.c if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) OP 1403 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_ONLY): OP 1426 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_RESPONSE_LAST): OP 1450 drivers/infiniband/hw/qib/qib_rc.c OP(RDMA_READ_RESPONSE_LAST), 0, rcd); OP 1575 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_REQUEST): { OP 1584 drivers/infiniband/hw/qib/qib_rc.c if (!e || e->opcode != OP(RDMA_READ_REQUEST)) OP 1625 drivers/infiniband/hw/qib/qib_rc.c case OP(COMPARE_SWAP): OP 1626 drivers/infiniband/hw/qib/qib_rc.c case OP(FETCH_ADD): { OP 1673 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(ACKNOWLEDGE); OP 1695 drivers/infiniband/hw/qib/qib_rc.c qp->s_ack_state = OP(ACKNOWLEDGE); OP 1749 drivers/infiniband/hw/qib/qib_rc.c if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && OP 1750 drivers/infiniband/hw/qib/qib_rc.c opcode <= OP(ATOMIC_ACKNOWLEDGE)) { OP 1766 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_FIRST): OP 1767 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_MIDDLE): OP 1768 drivers/infiniband/hw/qib/qib_rc.c if (opcode == OP(SEND_MIDDLE) || OP 1769 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(SEND_LAST) || OP 1770 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(SEND_LAST_WITH_IMMEDIATE)) OP 1774 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_FIRST): OP 1775 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_MIDDLE): OP 1776 drivers/infiniband/hw/qib/qib_rc.c if (opcode == OP(RDMA_WRITE_MIDDLE) || OP 1777 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(RDMA_WRITE_LAST) || OP 1778 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) OP 1783 drivers/infiniband/hw/qib/qib_rc.c if (opcode == OP(SEND_MIDDLE) || OP 1784 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(SEND_LAST) || OP 1785 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(SEND_LAST_WITH_IMMEDIATE) || OP 1786 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(RDMA_WRITE_MIDDLE) || OP 1787 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(RDMA_WRITE_LAST) || OP 1788 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) OP 1803 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_FIRST): OP 1811 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_MIDDLE): OP 1812 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_MIDDLE): OP 1823 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): OP 1832 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_ONLY): OP 1833 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_ONLY_WITH_IMMEDIATE): OP 1840 drivers/infiniband/hw/qib/qib_rc.c if (opcode == OP(SEND_ONLY)) OP 1843 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_LAST_WITH_IMMEDIATE): OP 1849 drivers/infiniband/hw/qib/qib_rc.c case OP(SEND_LAST): OP 1850 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_LAST): OP 1873 drivers/infiniband/hw/qib/qib_rc.c if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || OP 1874 drivers/infiniband/hw/qib/qib_rc.c opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) OP 1891 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_FIRST): OP 1892 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_ONLY): OP 1893 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): OP 1920 drivers/infiniband/hw/qib/qib_rc.c if (opcode == OP(RDMA_WRITE_FIRST)) OP 1922 drivers/infiniband/hw/qib/qib_rc.c else if (opcode == OP(RDMA_WRITE_ONLY)) OP 1936 drivers/infiniband/hw/qib/qib_rc.c case OP(RDMA_READ_REQUEST): { OP 1954 drivers/infiniband/hw/qib/qib_rc.c if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { OP 2003 drivers/infiniband/hw/qib/qib_rc.c case OP(COMPARE_SWAP): OP 2004 drivers/infiniband/hw/qib/qib_rc.c case OP(FETCH_ADD): { OP 2025 drivers/infiniband/hw/qib/qib_rc.c if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { OP 2042 drivers/infiniband/hw/qib/qib_rc.c e->atomic_data = (opcode == OP(FETCH_ADD)) ? OP 108 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(SEND_FIRST); OP 113 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(SEND_ONLY); OP 116 drivers/infiniband/hw/qib/qib_uc.c OP(SEND_ONLY_WITH_IMMEDIATE); OP 137 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(RDMA_WRITE_FIRST); OP 142 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(RDMA_WRITE_ONLY); OP 145 drivers/infiniband/hw/qib/qib_uc.c OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); OP 162 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_FIRST): OP 163 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(SEND_MIDDLE); OP 165 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_MIDDLE): OP 172 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(SEND_LAST); OP 174 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); OP 186 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_FIRST): OP 187 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(RDMA_WRITE_MIDDLE); OP 189 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_MIDDLE): OP 196 drivers/infiniband/hw/qib/qib_uc.c qp->s_state = OP(RDMA_WRITE_LAST); OP 199 drivers/infiniband/hw/qib/qib_uc.c OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); OP 274 drivers/infiniband/hw/qib/qib_uc.c if (qp->r_state == OP(SEND_FIRST) || OP 275 drivers/infiniband/hw/qib/qib_uc.c qp->r_state == OP(SEND_MIDDLE)) { OP 280 drivers/infiniband/hw/qib/qib_uc.c qp->r_state = OP(SEND_LAST); OP 282 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_FIRST): OP 283 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_ONLY): OP 284 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_ONLY_WITH_IMMEDIATE): OP 287 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_FIRST): OP 288 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_ONLY): OP 289 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): OP 299 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_FIRST): OP 300 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_MIDDLE): OP 301 drivers/infiniband/hw/qib/qib_uc.c if (opcode == OP(SEND_MIDDLE) || OP 302 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(SEND_LAST) || OP 303 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(SEND_LAST_WITH_IMMEDIATE)) OP 307 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_FIRST): OP 308 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_MIDDLE): OP 309 drivers/infiniband/hw/qib/qib_uc.c if (opcode == OP(RDMA_WRITE_MIDDLE) || OP 310 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(RDMA_WRITE_LAST) || OP 311 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) OP 316 drivers/infiniband/hw/qib/qib_uc.c if (opcode == OP(SEND_FIRST) || OP 317 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(SEND_ONLY) || OP 318 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(SEND_ONLY_WITH_IMMEDIATE) || OP 319 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(RDMA_WRITE_FIRST) || OP 320 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(RDMA_WRITE_ONLY) || OP 321 drivers/infiniband/hw/qib/qib_uc.c opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) OP 331 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_FIRST): OP 332 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_ONLY): OP 333 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_ONLY_WITH_IMMEDIATE): OP 350 drivers/infiniband/hw/qib/qib_uc.c if (opcode == OP(SEND_ONLY)) OP 352 drivers/infiniband/hw/qib/qib_uc.c else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE)) OP 355 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_MIDDLE): OP 365 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_LAST_WITH_IMMEDIATE): OP 371 drivers/infiniband/hw/qib/qib_uc.c case OP(SEND_LAST): OP 406 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_FIRST): OP 407 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_ONLY): OP 408 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */ OP 437 drivers/infiniband/hw/qib/qib_uc.c if (opcode == OP(RDMA_WRITE_ONLY)) OP 439 drivers/infiniband/hw/qib/qib_uc.c else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) { OP 444 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_MIDDLE): OP 454 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): OP 485 drivers/infiniband/hw/qib/qib_uc.c case OP(RDMA_WRITE_LAST): OP 3508 drivers/net/ethernet/qlogic/qed/qed_debug.c SET_VAR_FIELD(cam_addr, VFC_CAM_ADDR, OP, VFC_OPCODE_CAM_RD); OP 3560 drivers/net/ethernet/qlogic/qed/qed_debug.c SET_VAR_FIELD(ram_addr, VFC_RAM_ADDR, OP, VFC_OPCODE_RAM_RD); OP 437 drivers/pinctrl/cirrus/pinctrl-lochnagar.c #define LN_FUNC(NAME, TYPE, OP) \ OP 438 drivers/pinctrl/cirrus/pinctrl-lochnagar.c { .name = NAME, .type = LN_FTYPE_##TYPE, .op = OP } OP 440 drivers/pinctrl/cirrus/pinctrl-lochnagar.c #define LN_FUNC_PIN(REV, ID, OP) \ OP 441 drivers/pinctrl/cirrus/pinctrl-lochnagar.c LN_FUNC(lochnagar##REV##_##ID##_pin.name, PIN, OP) OP 443 drivers/pinctrl/cirrus/pinctrl-lochnagar.c #define LN1_FUNC_PIN(ID, OP) LN_FUNC_PIN(1, ID, OP) OP 444 drivers/pinctrl/cirrus/pinctrl-lochnagar.c #define LN2_FUNC_PIN(ID, OP) LN_FUNC_PIN(2, ID, OP) OP 446 drivers/pinctrl/cirrus/pinctrl-lochnagar.c #define LN_FUNC_AIF(REV, ID, OP) \ OP 447 drivers/pinctrl/cirrus/pinctrl-lochnagar.c LN_FUNC(lochnagar##REV##_##ID##_aif.name, AIF, OP) OP 449 drivers/pinctrl/cirrus/pinctrl-lochnagar.c #define LN1_FUNC_AIF(ID, OP) LN_FUNC_AIF(1, ID, OP) OP 450 drivers/pinctrl/cirrus/pinctrl-lochnagar.c #define LN2_FUNC_AIF(ID, OP) LN_FUNC_AIF(2, ID, OP) OP 452 drivers/pinctrl/cirrus/pinctrl-lochnagar.c #define LN2_FUNC_GAI(ID, OP, BOP, LROP, RXOP, TXOP) \ OP 453 drivers/pinctrl/cirrus/pinctrl-lochnagar.c LN2_FUNC_AIF(ID, OP), \ OP 1504 fs/afs/internal.h #define ASSERTCMP(X, OP, Y) \ OP 1506 fs/afs/internal.h if (unlikely(!((X) OP (Y)))) { \ OP 1509 fs/afs/internal.h printk(KERN_ERR "%lu " #OP " %lu is false\n", \ OP 1511 fs/afs/internal.h printk(KERN_ERR "0x%lx " #OP " 0x%lx is false\n", \ OP 1541 fs/afs/internal.h #define ASSERTIFCMP(C, X, OP, Y) \ OP 1543 fs/afs/internal.h if (unlikely((C) && !((X) OP (Y)))) { \ OP 1546 fs/afs/internal.h printk(KERN_ERR "%lu " #OP " %lu is false\n", \ OP 1548 fs/afs/internal.h printk(KERN_ERR "0x%lx " #OP " 0x%lx is false\n", \ OP 1560 fs/afs/internal.h #define ASSERTCMP(X, OP, Y) \ OP 1572 fs/afs/internal.h #define ASSERTIFCMP(C, X, OP, Y) \ OP 328 fs/cachefiles/internal.h #define ASSERTCMP(X, OP, Y) \ OP 330 fs/cachefiles/internal.h if (unlikely(!((X) OP (Y)))) { \ OP 333 fs/cachefiles/internal.h pr_err("%lx " #OP " %lx is false\n", \ OP 348 fs/cachefiles/internal.h #define ASSERTIFCMP(C, X, OP, Y) \ OP 350 fs/cachefiles/internal.h if (unlikely((C) && !((X) OP (Y)))) { \ OP 353 fs/cachefiles/internal.h pr_err("%lx " #OP " %lx is false\n", \ OP 362 fs/cachefiles/internal.h #define ASSERTCMP(X, OP, Y) do {} while (0) OP 364 fs/cachefiles/internal.h #define ASSERTIFCMP(C, X, OP, Y) do {} while (0) OP 452 fs/fscache/internal.h #define ASSERTCMP(X, OP, Y) \ OP 454 fs/fscache/internal.h if (unlikely(!((X) OP (Y)))) { \ OP 457 fs/fscache/internal.h pr_err("%lx " #OP " %lx is false\n", \ OP 472 fs/fscache/internal.h #define ASSERTIFCMP(C, X, OP, Y) \ OP 474 fs/fscache/internal.h if (unlikely((C) && !((X) OP (Y)))) { \ OP 477 fs/fscache/internal.h pr_err("%lx " #OP " %lx is false\n", \ OP 486 fs/fscache/internal.h #define ASSERTCMP(X, OP, Y) do {} while (0) OP 488 fs/fscache/internal.h #define ASSERTIFCMP(C, X, OP, Y) do {} while (0) OP 125 fs/proc/base.c #define NOD(NAME, MODE, IOP, FOP, OP) { \ OP 131 fs/proc/base.c .op = OP, \ OP 102 include/linux/capability.h #define CAP_BOP_ALL(c, a, b, OP) \ OP 106 include/linux/capability.h c.cap[__capi] = a.cap[__capi] OP b.cap[__capi]; \ OP 110 include/linux/capability.h #define CAP_UOP_ALL(c, a, OP) \ OP 114 include/linux/capability.h c.cap[__capi] = OP a.cap[__capi]; \ OP 84 include/linux/filter.h #define BPF_ALU64_REG(OP, DST, SRC) \ OP 86 include/linux/filter.h .code = BPF_ALU64 | BPF_OP(OP) | BPF_X, \ OP 92 include/linux/filter.h #define BPF_ALU32_REG(OP, DST, SRC) \ OP 94 include/linux/filter.h .code = BPF_ALU | BPF_OP(OP) | BPF_X, \ OP 102 include/linux/filter.h #define BPF_ALU64_IMM(OP, DST, IMM) \ OP 104 include/linux/filter.h .code = BPF_ALU64 | BPF_OP(OP) | BPF_K, \ OP 110 include/linux/filter.h #define BPF_ALU32_IMM(OP, DST, IMM) \ OP 112 include/linux/filter.h .code = BPF_ALU | BPF_OP(OP) | BPF_K, \ OP 280 include/linux/filter.h #define BPF_JMP_REG(OP, DST, SRC, OFF) \ OP 282 include/linux/filter.h .code = BPF_JMP | BPF_OP(OP) | BPF_X, \ OP 290 include/linux/filter.h #define BPF_JMP_IMM(OP, DST, IMM, OFF) \ OP 292 include/linux/filter.h .code = BPF_JMP | BPF_OP(OP) | BPF_K, \ OP 300 include/linux/filter.h #define BPF_JMP32_REG(OP, DST, SRC, OFF) \ OP 302 include/linux/filter.h .code = BPF_JMP32 | BPF_OP(OP) | BPF_X, \ OP 310 include/linux/filter.h #define BPF_JMP32_IMM(OP, DST, IMM, OFF) \ OP 312 include/linux/filter.h .code = BPF_JMP32 | BPF_OP(OP) | BPF_K, \ OP 978 include/linux/perf_event.h #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ OP 229 include/math-emu/op-common.h #define _FP_ADD_INTERNAL(fs, wc, R, X, Y, OP) \ OP 306 include/math-emu/op-common.h _FP_CHOOSENAN(fs, wc, R, X, Y, OP); \ OP 451 include/media/v4l2-common.h #define V4L2_FRACT_COMPARE(a, OP, b) \ OP 452 include/media/v4l2-common.h ((u64)(a).numerator * (b).denominator OP \ OP 1325 kernel/bpf/core.c #define ALU(OPCODE, OP) \ OP 1327 kernel/bpf/core.c DST = DST OP SRC; \ OP 1330 kernel/bpf/core.c DST = (u32) DST OP (u32) SRC; \ OP 1333 kernel/bpf/core.c DST = DST OP IMM; \ OP 1336 kernel/bpf/core.c DST = (u32) DST OP (u32) IMM; \ OP 1261 net/rxrpc/ar-internal.h #define ASSERTCMP(X, OP, Y) \ OP 1265 net/rxrpc/ar-internal.h if (unlikely(!(_x OP _y))) { \ OP 1267 net/rxrpc/ar-internal.h (unsigned long)_x, (unsigned long)_x, #OP, \ OP 1281 net/rxrpc/ar-internal.h #define ASSERTIFCMP(C, X, OP, Y) \ OP 1285 net/rxrpc/ar-internal.h if (unlikely((C) && !(_x OP _y))) { \ OP 1287 net/rxrpc/ar-internal.h (unsigned long)_x, (unsigned long)_x, #OP, \ OP 1299 net/rxrpc/ar-internal.h #define ASSERTCMP(X, OP, Y) \ OP 1307 net/rxrpc/ar-internal.h #define ASSERTIFCMP(C, X, OP, Y) \ OP 10 samples/bpf/bpf_insn.h #define BPF_ALU64_REG(OP, DST, SRC) \ OP 12 samples/bpf/bpf_insn.h .code = BPF_ALU64 | BPF_OP(OP) | BPF_X, \ OP 18 samples/bpf/bpf_insn.h #define BPF_ALU32_REG(OP, DST, SRC) \ OP 20 samples/bpf/bpf_insn.h .code = BPF_ALU | BPF_OP(OP) | BPF_X, \ OP 28 samples/bpf/bpf_insn.h #define BPF_ALU64_IMM(OP, DST, IMM) \ OP 30 samples/bpf/bpf_insn.h .code = BPF_ALU64 | BPF_OP(OP) | BPF_K, \ OP 36 samples/bpf/bpf_insn.h #define BPF_ALU32_IMM(OP, DST, IMM) \ OP 38 samples/bpf/bpf_insn.h .code = BPF_ALU | BPF_OP(OP) | BPF_K, \ OP 159 samples/bpf/bpf_insn.h #define BPF_JMP_REG(OP, DST, SRC, OFF) \ OP 161 samples/bpf/bpf_insn.h .code = BPF_JMP | BPF_OP(OP) | BPF_X, \ OP 169 samples/bpf/bpf_insn.h #define BPF_JMP32_REG(OP, DST, SRC, OFF) \ OP 171 samples/bpf/bpf_insn.h .code = BPF_JMP32 | BPF_OP(OP) | BPF_X, \ OP 179 samples/bpf/bpf_insn.h #define BPF_JMP_IMM(OP, DST, IMM, OFF) \ OP 181 samples/bpf/bpf_insn.h .code = BPF_JMP | BPF_OP(OP) | BPF_K, \ OP 189 samples/bpf/bpf_insn.h #define BPF_JMP32_IMM(OP, DST, IMM, OFF) \ OP 191 samples/bpf/bpf_insn.h .code = BPF_JMP32 | BPF_OP(OP) | BPF_K, \ OP 56 security/apparmor/include/net.h #define DEFINE_AUDIT_NET(NAME, OP, SK, F, T, P) \ OP 62 security/apparmor/include/net.h OP); \ OP 67 security/apparmor/include/net.h #define DEFINE_AUDIT_SK(NAME, OP, SK) \ OP 68 security/apparmor/include/net.h DEFINE_AUDIT_NET(NAME, OP, SK, (SK)->sk_family, (SK)->sk_type, \ OP 1782 sound/pci/emu10k1/emufx.c OP(icode, ptr, iMAC0, dst, C_00000000, src, vol); OP 1783 sound/pci/emu10k1/emufx.c OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff); OP 1784 sound/pci/emu10k1/emufx.c OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000001); OP 1785 sound/pci/emu10k1/emufx.c OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000); OP 1789 sound/pci/emu10k1/emufx.c OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff); OP 1790 sound/pci/emu10k1/emufx.c OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002); OP 1791 sound/pci/emu10k1/emufx.c OP(icode, ptr, iMACINT0, dst, dst, src, C_00000001); OP 1792 sound/pci/emu10k1/emufx.c OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001); OP 1793 sound/pci/emu10k1/emufx.c OP(icode, ptr, iMAC0, dst, dst, src, vol); OP 1797 sound/pci/emu10k1/emufx.c OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff); OP 1798 sound/pci/emu10k1/emufx.c OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002); OP 1799 sound/pci/emu10k1/emufx.c OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000); OP 1800 sound/pci/emu10k1/emufx.c OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001); OP 1801 sound/pci/emu10k1/emufx.c OP(icode, ptr, iMAC0, dst, C_00000000, src, vol); OP 1815 sound/pci/emu10k1/emufx.c OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw); OP 1821 sound/pci/emu10k1/emufx.c OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001); OP 1885 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000004); OP 1886 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000004); OP 1887 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000004); OP 1888 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000004); OP 1889 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000004); OP 1890 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000004); OP 1891 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000004); OP 1892 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000004); OP 1893 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */ OP 1894 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */ OP 1895 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000004); OP 1896 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000004); OP 1927 sound/pci/emu10k1/emufx.c /* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000); OP 1928 sound/pci/emu10k1/emufx.c /* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6)); OP 1930 sound/pci/emu10k1/emufx.c /* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000); OP 1931 sound/pci/emu10k1/emufx.c /* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004); OP 1933 sound/pci/emu10k1/emufx.c /* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000); OP 1934 sound/pci/emu10k1/emufx.c /* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5)); OP 1935 sound/pci/emu10k1/emufx.c /* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7)); OP 1936 sound/pci/emu10k1/emufx.c /* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000); OP 1938 sound/pci/emu10k1/emufx.c /* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001); OP 1939 sound/pci/emu10k1/emufx.c /* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000); OP 1940 sound/pci/emu10k1/emufx.c /* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11)); OP 1941 sound/pci/emu10k1/emufx.c /* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000); OP 1943 sound/pci/emu10k1/emufx.c /* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000); OP 1944 sound/pci/emu10k1/emufx.c /* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000); OP 1945 sound/pci/emu10k1/emufx.c /* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2)); OP 1946 sound/pci/emu10k1/emufx.c /* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001); OP 1947 sound/pci/emu10k1/emufx.c /* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2)); OP 1949 sound/pci/emu10k1/emufx.c /* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000); OP 1950 sound/pci/emu10k1/emufx.c /* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000); OP 1951 sound/pci/emu10k1/emufx.c /* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2)); OP 1952 sound/pci/emu10k1/emufx.c /* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001); OP 1953 sound/pci/emu10k1/emufx.c /* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2)); OP 1955 sound/pci/emu10k1/emufx.c /* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000); OP 1956 sound/pci/emu10k1/emufx.c /* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size)); OP 1957 sound/pci/emu10k1/emufx.c /* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001); OP 1958 sound/pci/emu10k1/emufx.c /* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000); OP 1959 sound/pci/emu10k1/emufx.c /* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000); OP 1961 sound/pci/emu10k1/emufx.c /* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000); OP 1962 sound/pci/emu10k1/emufx.c /* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002); OP 1963 sound/pci/emu10k1/emufx.c /* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000); OP 1964 sound/pci/emu10k1/emufx.c /* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000); OP 1965 sound/pci/emu10k1/emufx.c /* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000); OP 1967 sound/pci/emu10k1/emufx.c /* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001); OP 1968 sound/pci/emu10k1/emufx.c /* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002); OP 1970 sound/pci/emu10k1/emufx.c /* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff); OP 1971 sound/pci/emu10k1/emufx.c /* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff); OP 1989 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000); OP 1990 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000002); OP 2181 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), GPR(playback + 0), C_00000000, C_00000000); /* left */ OP 2182 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), GPR(playback + 1), C_00000000, C_00000000); /* right */ OP 2183 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), GPR(playback + 2), C_00000000, C_00000000); /* rear left */ OP 2184 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), GPR(playback + 3), C_00000000, C_00000000); /* rear right */ OP 2185 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), GPR(playback + 4), C_00000000, C_00000000); /* center */ OP 2186 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), GPR(playback + 5), C_00000000, C_00000000); /* LFE */ OP 2226 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j)); OP 2227 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j)); OP 2228 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j)); OP 2229 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j)); OP 2230 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j)); OP 2231 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000); OP 2233 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j)); OP 2234 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j)); OP 2235 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j)); OP 2236 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j)); OP 2237 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j)); OP 2238 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010); OP 2240 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000); OP 2255 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000); OP 2267 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), C_00000000, C_00000000); OP 2277 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000); OP 2279 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000); OP 2294 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000); OP 2310 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000); OP 2314 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000); OP 2318 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000); OP 2319 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000); OP 2321 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000); OP 2322 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000); OP 2328 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000); OP 2329 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000); OP 2331 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000); OP 2332 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000); OP 2338 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000); OP 2342 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000); OP 2355 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, FXBUS2(14), C_00000000, C_00000000, EXTIN(0)); OP 2356 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, FXBUS2(15), C_00000000, C_00000000, EXTIN(1)); OP 2357 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, FXBUS2(0), C_00000000, C_00000000, EXTIN(2)); OP 2358 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, FXBUS2(3), C_00000000, C_00000000, EXTIN(3)); OP 2360 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z)); OP 2363 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z)); OP 2380 sound/pci/emu10k1/emufx.c OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000); OP 34 tools/include/linux/filter.h #define BPF_ALU64_REG(OP, DST, SRC) \ OP 36 tools/include/linux/filter.h .code = BPF_ALU64 | BPF_OP(OP) | BPF_X, \ OP 42 tools/include/linux/filter.h #define BPF_ALU32_REG(OP, DST, SRC) \ OP 44 tools/include/linux/filter.h .code = BPF_ALU | BPF_OP(OP) | BPF_X, \ OP 52 tools/include/linux/filter.h #define BPF_ALU64_IMM(OP, DST, IMM) \ OP 54 tools/include/linux/filter.h .code = BPF_ALU64 | BPF_OP(OP) | BPF_K, \ OP 60 tools/include/linux/filter.h #define BPF_ALU32_IMM(OP, DST, IMM) \ OP 62 tools/include/linux/filter.h .code = BPF_ALU | BPF_OP(OP) | BPF_K, \ OP 194 tools/include/linux/filter.h #define BPF_JMP_REG(OP, DST, SRC, OFF) \ OP 196 tools/include/linux/filter.h .code = BPF_JMP | BPF_OP(OP) | BPF_X, \ OP 204 tools/include/linux/filter.h #define BPF_JMP32_REG(OP, DST, SRC, OFF) \ OP 206 tools/include/linux/filter.h .code = BPF_JMP32 | BPF_OP(OP) | BPF_X, \ OP 214 tools/include/linux/filter.h #define BPF_JMP_IMM(OP, DST, IMM, OFF) \ OP 216 tools/include/linux/filter.h .code = BPF_JMP | BPF_OP(OP) | BPF_K, \ OP 224 tools/include/linux/filter.h #define BPF_JMP32_IMM(OP, DST, IMM, OFF) \ OP 226 tools/include/linux/filter.h .code = BPF_JMP32 | BPF_OP(OP) | BPF_K, \ OP 148 tools/perf/util/event.h (PERF_MEM_S(OP, NA) |\ OP 339 tools/perf/util/mem-events.c if (op & P(OP, LOAD)) { OP 392 tools/perf/util/mem-events.c } else if (op & P(OP, STORE)) {