OMAP_IRQ_BIT      160 arch/arm/mach-omap1/pm.c 	u32 level2_wake = OMAP_IRQ_BIT(INT_UART2);
OMAP_IRQ_BIT      169 arch/arm/mach-omap1/pm.c 		level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) |
OMAP_IRQ_BIT      170 arch/arm/mach-omap1/pm.c 			OMAP_IRQ_BIT(INT_7XX_IH2_IRQ);
OMAP_IRQ_BIT      172 arch/arm/mach-omap1/pm.c 		level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
OMAP_IRQ_BIT      173 arch/arm/mach-omap1/pm.c 			OMAP_IRQ_BIT(INT_1510_IH2_IRQ);
OMAP_IRQ_BIT      175 arch/arm/mach-omap1/pm.c 		level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
OMAP_IRQ_BIT      176 arch/arm/mach-omap1/pm.c 			OMAP_IRQ_BIT(INT_1610_IH2_IRQ);
OMAP_IRQ_BIT      182 arch/arm/mach-omap1/pm.c 		omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) |
OMAP_IRQ_BIT      183 arch/arm/mach-omap1/pm.c 				OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)),
OMAP_IRQ_BIT      186 arch/arm/mach-omap1/pm.c 		level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
OMAP_IRQ_BIT      189 arch/arm/mach-omap1/pm.c 		level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
OMAP_IRQ_BIT      193 arch/arm/mach-omap1/pm.c 		omap_writel(~OMAP_IRQ_BIT(INT_1610_WAKE_UP_REQ),