OMAP54XX_CM_CORE_REGADDR 66 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CM_CORE_PROFILING_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_OCP_SOCKET_INST, 0x0040) OMAP54XX_CM_CORE_REGADDR 72 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKSEL_USB_60MHZ OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0004) OMAP54XX_CM_CORE_REGADDR 74 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKMODE_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0040) OMAP54XX_CM_CORE_REGADDR 76 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_IDLEST_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0044) OMAP54XX_CM_CORE_REGADDR 78 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_AUTOIDLE_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0048) OMAP54XX_CM_CORE_REGADDR 80 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKSEL_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x004c) OMAP54XX_CM_CORE_REGADDR 82 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_M2_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0050) OMAP54XX_CM_CORE_REGADDR 84 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_M3_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0054) OMAP54XX_CM_CORE_REGADDR 86 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_H11_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0058) OMAP54XX_CM_CORE_REGADDR 88 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_H12_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x005c) OMAP54XX_CM_CORE_REGADDR 90 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_H13_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0060) OMAP54XX_CM_CORE_REGADDR 92 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_H14_DPLL_PER OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0064) OMAP54XX_CM_CORE_REGADDR 96 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKMODE_DPLL_USB OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0080) OMAP54XX_CM_CORE_REGADDR 98 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_IDLEST_DPLL_USB OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0084) OMAP54XX_CM_CORE_REGADDR 100 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_AUTOIDLE_DPLL_USB OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0088) OMAP54XX_CM_CORE_REGADDR 102 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKSEL_DPLL_USB OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x008c) OMAP54XX_CM_CORE_REGADDR 104 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_M2_DPLL_USB OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0090) OMAP54XX_CM_CORE_REGADDR 108 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKDCOLDO_DPLL_USB OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x00b4) OMAP54XX_CM_CORE_REGADDR 110 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKMODE_DPLL_UNIPRO2 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x00c0) OMAP54XX_CM_CORE_REGADDR 112 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_IDLEST_DPLL_UNIPRO2 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x00c4) OMAP54XX_CM_CORE_REGADDR 114 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_AUTOIDLE_DPLL_UNIPRO2 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x00c8) OMAP54XX_CM_CORE_REGADDR 116 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKSEL_DPLL_UNIPRO2 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x00cc) OMAP54XX_CM_CORE_REGADDR 118 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_M2_DPLL_UNIPRO2 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x00d0) OMAP54XX_CM_CORE_REGADDR 122 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKDCOLDO_DPLL_UNIPRO2 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x00f4) OMAP54XX_CM_CORE_REGADDR 124 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKMODE_DPLL_UNIPRO1 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0100) OMAP54XX_CM_CORE_REGADDR 126 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_IDLEST_DPLL_UNIPRO1 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0104) OMAP54XX_CM_CORE_REGADDR 128 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_AUTOIDLE_DPLL_UNIPRO1 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0108) OMAP54XX_CM_CORE_REGADDR 130 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKSEL_DPLL_UNIPRO1 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x010c) OMAP54XX_CM_CORE_REGADDR 132 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DIV_M2_DPLL_UNIPRO1 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0110) OMAP54XX_CM_CORE_REGADDR 136 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CLKDCOLDO_DPLL_UNIPRO1 OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CKGEN_INST, 0x0134) OMAP54XX_CM_CORE_REGADDR 141 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_COREAON_SMARTREFLEX_MPU_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_COREAON_INST, 0x0028) OMAP54XX_CM_CORE_REGADDR 143 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_COREAON_SMARTREFLEX_MM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_COREAON_INST, 0x0030) OMAP54XX_CM_CORE_REGADDR 145 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_COREAON_SMARTREFLEX_CORE_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_COREAON_INST, 0x0038) OMAP54XX_CM_CORE_REGADDR 147 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_COREAON_USB_PHY_CORE_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_COREAON_INST, 0x0040) OMAP54XX_CM_CORE_REGADDR 149 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_COREAON_IO_SRCOMP_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_COREAON_INST, 0x0050) OMAP54XX_CM_CORE_REGADDR 155 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3MAIN1_L3_MAIN_1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0020) OMAP54XX_CM_CORE_REGADDR 159 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3MAIN2_L3_MAIN_2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0120) OMAP54XX_CM_CORE_REGADDR 161 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3MAIN2_GPMC_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0128) OMAP54XX_CM_CORE_REGADDR 163 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3MAIN2_OCMC_RAM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0130) OMAP54XX_CM_CORE_REGADDR 168 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_IPU_IPU_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0220) OMAP54XX_CM_CORE_REGADDR 173 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DMA_DMA_SYSTEM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0320) OMAP54XX_CM_CORE_REGADDR 176 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_DMM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0420) OMAP54XX_CM_CORE_REGADDR 178 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_EMIF_OCP_FW_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0428) OMAP54XX_CM_CORE_REGADDR 180 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_EMIF1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0430) OMAP54XX_CM_CORE_REGADDR 182 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_EMIF2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0438) OMAP54XX_CM_CORE_REGADDR 184 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_EMIF_DLL_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0440) OMAP54XX_CM_CORE_REGADDR 189 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_C2C_C2C_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0520) OMAP54XX_CM_CORE_REGADDR 191 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_C2C_MODEM_ICR_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0528) OMAP54XX_CM_CORE_REGADDR 193 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_C2C_C2C_OCP_FW_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0530) OMAP54XX_CM_CORE_REGADDR 197 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_L4_CFG_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0620) OMAP54XX_CM_CORE_REGADDR 199 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_SPINLOCK_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0628) OMAP54XX_CM_CORE_REGADDR 201 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_MAILBOX_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0630) OMAP54XX_CM_CORE_REGADDR 203 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_SAR_ROM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0638) OMAP54XX_CM_CORE_REGADDR 205 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_OCP2SCP2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0640) OMAP54XX_CM_CORE_REGADDR 208 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_L3_MAIN_3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0720) OMAP54XX_CM_CORE_REGADDR 210 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_L3_INSTR_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0728) OMAP54XX_CM_CORE_REGADDR 212 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_OCP_WP_NOC_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0740) OMAP54XX_CM_CORE_REGADDR 214 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_DLL_AGING_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0748) OMAP54XX_CM_CORE_REGADDR 216 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_CTRL_MODULE_BANDGAP_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0750) OMAP54XX_CM_CORE_REGADDR 221 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_MIPIEXT_LLI_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0820) OMAP54XX_CM_CORE_REGADDR 223 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_MIPIEXT_LLI_OCP_FW_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0828) OMAP54XX_CM_CORE_REGADDR 225 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_MIPIEXT_MPHY_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0830) OMAP54XX_CM_CORE_REGADDR 229 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER10_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0928) OMAP54XX_CM_CORE_REGADDR 231 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER11_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0930) OMAP54XX_CM_CORE_REGADDR 233 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0938) OMAP54XX_CM_CORE_REGADDR 235 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0940) OMAP54XX_CM_CORE_REGADDR 237 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0948) OMAP54XX_CM_CORE_REGADDR 239 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER9_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0950) OMAP54XX_CM_CORE_REGADDR 241 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_ELM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0958) OMAP54XX_CM_CORE_REGADDR 243 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0960) OMAP54XX_CM_CORE_REGADDR 245 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0968) OMAP54XX_CM_CORE_REGADDR 247 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0970) OMAP54XX_CM_CORE_REGADDR 249 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0978) OMAP54XX_CM_CORE_REGADDR 251 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO6_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0980) OMAP54XX_CM_CORE_REGADDR 253 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_HDQ1W_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0988) OMAP54XX_CM_CORE_REGADDR 255 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09a0) OMAP54XX_CM_CORE_REGADDR 257 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09a8) OMAP54XX_CM_CORE_REGADDR 259 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09b0) OMAP54XX_CM_CORE_REGADDR 261 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09b8) OMAP54XX_CM_CORE_REGADDR 263 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_L4_PER_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09c0) OMAP54XX_CM_CORE_REGADDR 265 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MCSPI1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09f0) OMAP54XX_CM_CORE_REGADDR 267 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MCSPI2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09f8) OMAP54XX_CM_CORE_REGADDR 269 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MCSPI3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a00) OMAP54XX_CM_CORE_REGADDR 271 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MCSPI4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a08) OMAP54XX_CM_CORE_REGADDR 273 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO7_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a10) OMAP54XX_CM_CORE_REGADDR 275 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO8_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a18) OMAP54XX_CM_CORE_REGADDR 277 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MMC3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a20) OMAP54XX_CM_CORE_REGADDR 279 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MMC4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a28) OMAP54XX_CM_CORE_REGADDR 281 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a40) OMAP54XX_CM_CORE_REGADDR 283 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a48) OMAP54XX_CM_CORE_REGADDR 285 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a50) OMAP54XX_CM_CORE_REGADDR 287 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a58) OMAP54XX_CM_CORE_REGADDR 289 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MMC5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a60) OMAP54XX_CM_CORE_REGADDR 291 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a68) OMAP54XX_CM_CORE_REGADDR 293 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a70) OMAP54XX_CM_CORE_REGADDR 295 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART6_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a78) OMAP54XX_CM_CORE_REGADDR 300 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_AES1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0aa0) OMAP54XX_CM_CORE_REGADDR 302 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_AES2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0aa8) OMAP54XX_CM_CORE_REGADDR 304 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_DES3DES_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ab0) OMAP54XX_CM_CORE_REGADDR 306 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_FPKA_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ab8) OMAP54XX_CM_CORE_REGADDR 308 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_RNG_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ac0) OMAP54XX_CM_CORE_REGADDR 310 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_SHA2MD5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ac8) OMAP54XX_CM_CORE_REGADDR 312 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_DMA_CRYPTO_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ad8) OMAP54XX_CM_CORE_REGADDR 319 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_IVA_IVA_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_IVA_INST, 0x0020) OMAP54XX_CM_CORE_REGADDR 321 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_IVA_SL2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_IVA_INST, 0x0028) OMAP54XX_CM_CORE_REGADDR 328 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CAM_ISS_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CAM_INST, 0x0020) OMAP54XX_CM_CORE_REGADDR 330 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CAM_FDIF_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CAM_INST, 0x0028) OMAP54XX_CM_CORE_REGADDR 332 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CAM_CAL_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CAM_INST, 0x0030) OMAP54XX_CM_CORE_REGADDR 339 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DSS_DSS_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_DSS_INST, 0x0020) OMAP54XX_CM_CORE_REGADDR 341 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DSS_BB2D_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_DSS_INST, 0x0030) OMAP54XX_CM_CORE_REGADDR 348 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_GPU_GPU_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_GPU_INST, 0x0020) OMAP54XX_CM_CORE_REGADDR 355 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_MMC1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0028) OMAP54XX_CM_CORE_REGADDR 357 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_MMC2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0030) OMAP54XX_CM_CORE_REGADDR 359 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_HSI_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0038) OMAP54XX_CM_CORE_REGADDR 361 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_UNIPRO2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0040) OMAP54XX_CM_CORE_REGADDR 363 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_MPHY_UNIPRO2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0048) OMAP54XX_CM_CORE_REGADDR 365 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_USB_HOST_HS_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0058) OMAP54XX_CM_CORE_REGADDR 367 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_USB_TLL_HS_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0068) OMAP54XX_CM_CORE_REGADDR 369 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_IEEE1500_2_OCP_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0078) OMAP54XX_CM_CORE_REGADDR 371 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_SATA_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x0088) OMAP54XX_CM_CORE_REGADDR 373 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_OCP2SCP1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x00e0) OMAP54XX_CM_CORE_REGADDR 375 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x00e8) OMAP54XX_CM_CORE_REGADDR 377 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INIT_USB_OTG_SS_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_L3INIT_INST, 0x00f0) OMAP54XX_CM_CORE_REGADDR 382 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_CUSTEFUSE_EFUSE_CTRL_CUST_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CUSTEFUSE_INST, 0x0020)