OMAP54XX_CM_CORE_CORE_INST 168 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 192 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 203 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 213 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 232 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 244 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 288 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 299 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 381 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 392 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 400 arch/arm/mach-omap2/clockdomains54xx_data.c .cm_inst = OMAP54XX_CM_CORE_CORE_INST, OMAP54XX_CM_CORE_CORE_INST 155 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3MAIN1_L3_MAIN_1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0020) OMAP54XX_CM_CORE_CORE_INST 159 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3MAIN2_L3_MAIN_2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0120) OMAP54XX_CM_CORE_CORE_INST 161 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3MAIN2_GPMC_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0128) OMAP54XX_CM_CORE_CORE_INST 163 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3MAIN2_OCMC_RAM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0130) OMAP54XX_CM_CORE_CORE_INST 168 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_IPU_IPU_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0220) OMAP54XX_CM_CORE_CORE_INST 173 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_DMA_DMA_SYSTEM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0320) OMAP54XX_CM_CORE_CORE_INST 176 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_DMM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0420) OMAP54XX_CM_CORE_CORE_INST 178 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_EMIF_OCP_FW_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0428) OMAP54XX_CM_CORE_CORE_INST 180 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_EMIF1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0430) OMAP54XX_CM_CORE_CORE_INST 182 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_EMIF2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0438) OMAP54XX_CM_CORE_CORE_INST 184 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_EMIF_EMIF_DLL_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0440) OMAP54XX_CM_CORE_CORE_INST 189 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_C2C_C2C_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0520) OMAP54XX_CM_CORE_CORE_INST 191 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_C2C_MODEM_ICR_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0528) OMAP54XX_CM_CORE_CORE_INST 193 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_C2C_C2C_OCP_FW_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0530) OMAP54XX_CM_CORE_CORE_INST 197 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_L4_CFG_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0620) OMAP54XX_CM_CORE_CORE_INST 199 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_SPINLOCK_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0628) OMAP54XX_CM_CORE_CORE_INST 201 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_MAILBOX_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0630) OMAP54XX_CM_CORE_CORE_INST 203 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_SAR_ROM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0638) OMAP54XX_CM_CORE_CORE_INST 205 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4CFG_OCP2SCP2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0640) OMAP54XX_CM_CORE_CORE_INST 208 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_L3_MAIN_3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0720) OMAP54XX_CM_CORE_CORE_INST 210 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_L3_INSTR_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0728) OMAP54XX_CM_CORE_CORE_INST 212 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_OCP_WP_NOC_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0740) OMAP54XX_CM_CORE_CORE_INST 214 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_DLL_AGING_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0748) OMAP54XX_CM_CORE_CORE_INST 216 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L3INSTR_CTRL_MODULE_BANDGAP_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0750) OMAP54XX_CM_CORE_CORE_INST 221 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_MIPIEXT_LLI_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0820) OMAP54XX_CM_CORE_CORE_INST 223 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_MIPIEXT_LLI_OCP_FW_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0828) OMAP54XX_CM_CORE_CORE_INST 225 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_MIPIEXT_MPHY_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0830) OMAP54XX_CM_CORE_CORE_INST 229 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER10_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0928) OMAP54XX_CM_CORE_CORE_INST 231 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER11_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0930) OMAP54XX_CM_CORE_CORE_INST 233 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0938) OMAP54XX_CM_CORE_CORE_INST 235 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0940) OMAP54XX_CM_CORE_CORE_INST 237 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0948) OMAP54XX_CM_CORE_CORE_INST 239 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_TIMER9_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0950) OMAP54XX_CM_CORE_CORE_INST 241 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_ELM_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0958) OMAP54XX_CM_CORE_CORE_INST 243 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0960) OMAP54XX_CM_CORE_CORE_INST 245 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0968) OMAP54XX_CM_CORE_CORE_INST 247 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0970) OMAP54XX_CM_CORE_CORE_INST 249 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0978) OMAP54XX_CM_CORE_CORE_INST 251 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO6_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0980) OMAP54XX_CM_CORE_CORE_INST 253 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_HDQ1W_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0988) OMAP54XX_CM_CORE_CORE_INST 255 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09a0) OMAP54XX_CM_CORE_CORE_INST 257 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09a8) OMAP54XX_CM_CORE_CORE_INST 259 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09b0) OMAP54XX_CM_CORE_CORE_INST 261 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09b8) OMAP54XX_CM_CORE_CORE_INST 263 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_L4_PER_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09c0) OMAP54XX_CM_CORE_CORE_INST 265 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MCSPI1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09f0) OMAP54XX_CM_CORE_CORE_INST 267 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MCSPI2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x09f8) OMAP54XX_CM_CORE_CORE_INST 269 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MCSPI3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a00) OMAP54XX_CM_CORE_CORE_INST 271 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MCSPI4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a08) OMAP54XX_CM_CORE_CORE_INST 273 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO7_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a10) OMAP54XX_CM_CORE_CORE_INST 275 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_GPIO8_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a18) OMAP54XX_CM_CORE_CORE_INST 277 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MMC3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a20) OMAP54XX_CM_CORE_CORE_INST 279 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MMC4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a28) OMAP54XX_CM_CORE_CORE_INST 281 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a40) OMAP54XX_CM_CORE_CORE_INST 283 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a48) OMAP54XX_CM_CORE_CORE_INST 285 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART3_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a50) OMAP54XX_CM_CORE_CORE_INST 287 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART4_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a58) OMAP54XX_CM_CORE_CORE_INST 289 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_MMC5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a60) OMAP54XX_CM_CORE_CORE_INST 291 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_I2C5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a68) OMAP54XX_CM_CORE_CORE_INST 293 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a70) OMAP54XX_CM_CORE_CORE_INST 295 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4PER_UART6_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0a78) OMAP54XX_CM_CORE_CORE_INST 300 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_AES1_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0aa0) OMAP54XX_CM_CORE_CORE_INST 302 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_AES2_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0aa8) OMAP54XX_CM_CORE_CORE_INST 304 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_DES3DES_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ab0) OMAP54XX_CM_CORE_CORE_INST 306 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_FPKA_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ab8) OMAP54XX_CM_CORE_CORE_INST 308 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_RNG_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ac0) OMAP54XX_CM_CORE_CORE_INST 310 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_SHA2MD5_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ac8) OMAP54XX_CM_CORE_CORE_INST 312 arch/arm/mach-omap2/cm2_54xx.h #define OMAP54XX_CM_L4SEC_DMA_CRYPTO_CLKCTRL OMAP54XX_CM_CORE_REGADDR(OMAP54XX_CM_CORE_CORE_INST, 0x0ad8)