OMAP44XX_PRCM_MPU_REGADDR 30 arch/arm/mach-omap2/prcm_mpu44xx.c return readl_relaxed(OMAP44XX_PRCM_MPU_REGADDR(inst, reg)); OMAP44XX_PRCM_MPU_REGADDR 35 arch/arm/mach-omap2/prcm_mpu44xx.c writel_relaxed(val, OMAP44XX_PRCM_MPU_REGADDR(inst, reg)); OMAP44XX_PRCM_MPU_REGADDR 54 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) OMAP44XX_PRCM_MPU_REGADDR 58 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) OMAP44XX_PRCM_MPU_REGADDR 60 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) OMAP44XX_PRCM_MPU_REGADDR 64 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) OMAP44XX_PRCM_MPU_REGADDR 66 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) OMAP44XX_PRCM_MPU_REGADDR 68 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) OMAP44XX_PRCM_MPU_REGADDR 70 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) OMAP44XX_PRCM_MPU_REGADDR 72 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) OMAP44XX_PRCM_MPU_REGADDR 74 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) OMAP44XX_PRCM_MPU_REGADDR 76 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) OMAP44XX_PRCM_MPU_REGADDR 80 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) OMAP44XX_PRCM_MPU_REGADDR 82 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) OMAP44XX_PRCM_MPU_REGADDR 84 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) OMAP44XX_PRCM_MPU_REGADDR 86 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) OMAP44XX_PRCM_MPU_REGADDR 88 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) OMAP44XX_PRCM_MPU_REGADDR 90 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) OMAP44XX_PRCM_MPU_REGADDR 92 arch/arm/mach-omap2/prcm_mpu44xx.h #define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)