OMAP44XX_CM2_REGADDR 69 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_REVISION_CM2 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_OCP_SOCKET_INST, 0x0000) OMAP44XX_CM2_REGADDR 71 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CM2_PROFILING_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_OCP_SOCKET_INST, 0x0040) OMAP44XX_CM2_REGADDR 75 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_DUCATI_ISS_ROOT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0000) OMAP44XX_CM2_REGADDR 77 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_USB_60MHZ OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0004) OMAP44XX_CM2_REGADDR 79 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SCALE_FCLK OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0008) OMAP44XX_CM2_REGADDR 81 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_PERF1 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0010) OMAP44XX_CM2_REGADDR 83 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_PERF2 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0014) OMAP44XX_CM2_REGADDR 85 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_PERF3 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0018) OMAP44XX_CM2_REGADDR 87 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_PERF4 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x001c) OMAP44XX_CM2_REGADDR 89 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_CURRENT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0024) OMAP44XX_CM2_REGADDR 91 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVA_DVFS_PERF_TESLA OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0028) OMAP44XX_CM2_REGADDR 93 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVA_DVFS_PERF_IVAHD OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x002c) OMAP44XX_CM2_REGADDR 95 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVA_DVFS_PERF_ABE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0030) OMAP44XX_CM2_REGADDR 97 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVA_DVFS_CURRENT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0038) OMAP44XX_CM2_REGADDR 99 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKMODE_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0040) OMAP44XX_CM2_REGADDR 101 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IDLEST_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0044) OMAP44XX_CM2_REGADDR 103 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_AUTOIDLE_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0048) OMAP44XX_CM2_REGADDR 105 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x004c) OMAP44XX_CM2_REGADDR 107 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M2_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0050) OMAP44XX_CM2_REGADDR 109 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M3_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0054) OMAP44XX_CM2_REGADDR 111 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M4_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0058) OMAP44XX_CM2_REGADDR 113 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M5_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x005c) OMAP44XX_CM2_REGADDR 115 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M6_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0060) OMAP44XX_CM2_REGADDR 117 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064) OMAP44XX_CM2_REGADDR 119 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068) OMAP44XX_CM2_REGADDR 121 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) OMAP44XX_CM2_REGADDR 123 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080) OMAP44XX_CM2_REGADDR 125 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IDLEST_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0084) OMAP44XX_CM2_REGADDR 127 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_AUTOIDLE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0088) OMAP44XX_CM2_REGADDR 129 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x008c) OMAP44XX_CM2_REGADDR 131 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090) OMAP44XX_CM2_REGADDR 133 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8) OMAP44XX_CM2_REGADDR 135 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) OMAP44XX_CM2_REGADDR 137 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4) OMAP44XX_CM2_REGADDR 139 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKMODE_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c0) OMAP44XX_CM2_REGADDR 141 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IDLEST_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c4) OMAP44XX_CM2_REGADDR 143 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c8) OMAP44XX_CM2_REGADDR 145 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00cc) OMAP44XX_CM2_REGADDR 147 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0) OMAP44XX_CM2_REGADDR 149 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8) OMAP44XX_CM2_REGADDR 151 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) OMAP44XX_CM2_REGADDR 155 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_ALWON_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0000) OMAP44XX_CM2_REGADDR 157 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_ALWON_MDMINTC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0020) OMAP44XX_CM2_REGADDR 159 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_ALWON_SR_MPU_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0028) OMAP44XX_CM2_REGADDR 161 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_ALWON_SR_IVA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0030) OMAP44XX_CM2_REGADDR 163 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_ALWON_SR_CORE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0038) OMAP44XX_CM2_REGADDR 165 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_ALWON_USBPHY_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0040) OMAP44XX_CM2_REGADDR 169 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_1_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0000) OMAP44XX_CM2_REGADDR 171 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_1_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0008) OMAP44XX_CM2_REGADDR 173 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_1_L3_1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0020) OMAP44XX_CM2_REGADDR 175 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0100) OMAP44XX_CM2_REGADDR 177 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0108) OMAP44XX_CM2_REGADDR 179 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_L3_2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0120) OMAP44XX_CM2_REGADDR 181 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_GPMC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0128) OMAP44XX_CM2_REGADDR 183 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_OCMC_RAM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0130) OMAP44XX_CM2_REGADDR 185 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DUCATI_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0200) OMAP44XX_CM2_REGADDR 187 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DUCATI_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0204) OMAP44XX_CM2_REGADDR 189 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DUCATI_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0208) OMAP44XX_CM2_REGADDR 191 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DUCATI_DUCATI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0220) OMAP44XX_CM2_REGADDR 193 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SDMA_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0300) OMAP44XX_CM2_REGADDR 195 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SDMA_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0304) OMAP44XX_CM2_REGADDR 197 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SDMA_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0308) OMAP44XX_CM2_REGADDR 199 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SDMA_SDMA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0320) OMAP44XX_CM2_REGADDR 201 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0400) OMAP44XX_CM2_REGADDR 203 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_DMM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0420) OMAP44XX_CM2_REGADDR 205 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0428) OMAP44XX_CM2_REGADDR 207 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0430) OMAP44XX_CM2_REGADDR 209 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0438) OMAP44XX_CM2_REGADDR 211 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_DLL_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0440) OMAP44XX_CM2_REGADDR 213 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_H1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0450) OMAP44XX_CM2_REGADDR 215 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_H2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0458) OMAP44XX_CM2_REGADDR 217 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_DLL_H_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0460) OMAP44XX_CM2_REGADDR 219 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0500) OMAP44XX_CM2_REGADDR 221 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0504) OMAP44XX_CM2_REGADDR 223 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508) OMAP44XX_CM2_REGADDR 225 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520) OMAP44XX_CM2_REGADDR 227 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) OMAP44XX_CM2_REGADDR 229 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530) OMAP44XX_CM2_REGADDR 231 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0600) OMAP44XX_CM2_REGADDR 233 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0608) OMAP44XX_CM2_REGADDR 235 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_L4_CFG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0620) OMAP44XX_CM2_REGADDR 237 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0628) OMAP44XX_CM2_REGADDR 239 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0630) OMAP44XX_CM2_REGADDR 241 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_SAR_ROM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0638) OMAP44XX_CM2_REGADDR 243 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INSTR_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0700) OMAP44XX_CM2_REGADDR 245 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0720) OMAP44XX_CM2_REGADDR 247 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0728) OMAP44XX_CM2_REGADDR 249 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0740) OMAP44XX_CM2_REGADDR 253 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVAHD_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0000) OMAP44XX_CM2_REGADDR 255 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVAHD_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0004) OMAP44XX_CM2_REGADDR 257 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVAHD_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0008) OMAP44XX_CM2_REGADDR 259 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVAHD_IVAHD_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0020) OMAP44XX_CM2_REGADDR 261 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVAHD_SL2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0028) OMAP44XX_CM2_REGADDR 265 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CAM_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0000) OMAP44XX_CM2_REGADDR 267 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CAM_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0004) OMAP44XX_CM2_REGADDR 269 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CAM_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0008) OMAP44XX_CM2_REGADDR 271 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CAM_ISS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0020) OMAP44XX_CM2_REGADDR 273 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CAM_FDIF_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0028) OMAP44XX_CM2_REGADDR 277 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DSS_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0000) OMAP44XX_CM2_REGADDR 279 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DSS_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0004) OMAP44XX_CM2_REGADDR 281 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DSS_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0008) OMAP44XX_CM2_REGADDR 283 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DSS_DSS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0020) OMAP44XX_CM2_REGADDR 285 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DSS_DEISS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0028) OMAP44XX_CM2_REGADDR 289 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_GFX_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0000) OMAP44XX_CM2_REGADDR 291 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_GFX_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0004) OMAP44XX_CM2_REGADDR 293 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_GFX_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0008) OMAP44XX_CM2_REGADDR 295 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_GFX_GFX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0020) OMAP44XX_CM2_REGADDR 299 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0000) OMAP44XX_CM2_REGADDR 301 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0004) OMAP44XX_CM2_REGADDR 303 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0008) OMAP44XX_CM2_REGADDR 305 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_MMC1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0028) OMAP44XX_CM2_REGADDR 307 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_MMC2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0030) OMAP44XX_CM2_REGADDR 309 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_HSI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0038) OMAP44XX_CM2_REGADDR 311 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_UNIPRO1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0040) OMAP44XX_CM2_REGADDR 313 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0058) OMAP44XX_CM2_REGADDR 315 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0060) OMAP44XX_CM2_REGADDR 317 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0068) OMAP44XX_CM2_REGADDR 319 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_P1500_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0078) OMAP44XX_CM2_REGADDR 321 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_EMAC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0080) OMAP44XX_CM2_REGADDR 323 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_SATA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0088) OMAP44XX_CM2_REGADDR 325 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_TPPSS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0090) OMAP44XX_CM2_REGADDR 327 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_PCIESS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0098) OMAP44XX_CM2_REGADDR 329 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_CCPTX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00a8) OMAP44XX_CM2_REGADDR 331 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_XHPI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00c0) OMAP44XX_CM2_REGADDR 333 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_MMC6_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00c8) OMAP44XX_CM2_REGADDR 335 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_USB_HOST_FS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00d0) OMAP44XX_CM2_REGADDR 337 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00e0) OMAP44XX_CM2_REGADDR 341 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0000) OMAP44XX_CM2_REGADDR 343 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0008) OMAP44XX_CM2_REGADDR 345 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_ADC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0020) OMAP44XX_CM2_REGADDR 347 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0028) OMAP44XX_CM2_REGADDR 349 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0030) OMAP44XX_CM2_REGADDR 351 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0038) OMAP44XX_CM2_REGADDR 353 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0040) OMAP44XX_CM2_REGADDR 355 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0048) OMAP44XX_CM2_REGADDR 357 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0050) OMAP44XX_CM2_REGADDR 359 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_ELM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0058) OMAP44XX_CM2_REGADDR 361 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0060) OMAP44XX_CM2_REGADDR 363 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0068) OMAP44XX_CM2_REGADDR 365 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0070) OMAP44XX_CM2_REGADDR 367 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0078) OMAP44XX_CM2_REGADDR 369 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO6_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0080) OMAP44XX_CM2_REGADDR 371 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_HDQ1W_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0088) OMAP44XX_CM2_REGADDR 373 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_HECC1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0090) OMAP44XX_CM2_REGADDR 375 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_HECC2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0098) OMAP44XX_CM2_REGADDR 377 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00a0) OMAP44XX_CM2_REGADDR 379 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00a8) OMAP44XX_CM2_REGADDR 381 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00b0) OMAP44XX_CM2_REGADDR 383 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00b8) OMAP44XX_CM2_REGADDR 385 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_L4PER_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00c0) OMAP44XX_CM2_REGADDR 387 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCASP2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00d0) OMAP44XX_CM2_REGADDR 389 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCASP3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00d8) OMAP44XX_CM2_REGADDR 391 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCBSP4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00e0) OMAP44XX_CM2_REGADDR 393 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MGATE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00e8) OMAP44XX_CM2_REGADDR 395 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCSPI1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00f0) OMAP44XX_CM2_REGADDR 397 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCSPI2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00f8) OMAP44XX_CM2_REGADDR 399 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCSPI3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0100) OMAP44XX_CM2_REGADDR 401 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCSPI4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0108) OMAP44XX_CM2_REGADDR 403 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MMCSD3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0120) OMAP44XX_CM2_REGADDR 405 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MMCSD4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0128) OMAP44XX_CM2_REGADDR 407 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MSPROHG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0130) OMAP44XX_CM2_REGADDR 409 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0138) OMAP44XX_CM2_REGADDR 411 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_UART1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0140) OMAP44XX_CM2_REGADDR 413 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_UART2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0148) OMAP44XX_CM2_REGADDR 415 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_UART3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0150) OMAP44XX_CM2_REGADDR 417 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_UART4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0158) OMAP44XX_CM2_REGADDR 419 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MMCSD5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0160) OMAP44XX_CM2_REGADDR 421 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0168) OMAP44XX_CM2_REGADDR 423 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0180) OMAP44XX_CM2_REGADDR 425 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0184) OMAP44XX_CM2_REGADDR 427 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0188) OMAP44XX_CM2_REGADDR 429 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_AES1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01a0) OMAP44XX_CM2_REGADDR 431 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_AES2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01a8) OMAP44XX_CM2_REGADDR 433 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_DES3DES_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01b0) OMAP44XX_CM2_REGADDR 435 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01b8) OMAP44XX_CM2_REGADDR 437 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_RNG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01c0) OMAP44XX_CM2_REGADDR 439 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01c8) OMAP44XX_CM2_REGADDR 441 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_CRYPTODMA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01d8) OMAP44XX_CM2_REGADDR 445 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CEFUSE_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0000) OMAP44XX_CM2_REGADDR 447 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020)