OMAP4430_CM2_L4PER_INST 212 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_L4PER_INST, OMAP4430_CM2_L4PER_INST 224 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_L4PER_INST, OMAP4430_CM2_L4PER_INST 341 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0000) OMAP4430_CM2_L4PER_INST 343 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0008) OMAP4430_CM2_L4PER_INST 345 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_ADC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0020) OMAP4430_CM2_L4PER_INST 347 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0028) OMAP4430_CM2_L4PER_INST 349 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0030) OMAP4430_CM2_L4PER_INST 351 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0038) OMAP4430_CM2_L4PER_INST 353 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0040) OMAP4430_CM2_L4PER_INST 355 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0048) OMAP4430_CM2_L4PER_INST 357 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0050) OMAP4430_CM2_L4PER_INST 359 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_ELM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0058) OMAP4430_CM2_L4PER_INST 361 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0060) OMAP4430_CM2_L4PER_INST 363 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0068) OMAP4430_CM2_L4PER_INST 365 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0070) OMAP4430_CM2_L4PER_INST 367 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0078) OMAP4430_CM2_L4PER_INST 369 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_GPIO6_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0080) OMAP4430_CM2_L4PER_INST 371 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_HDQ1W_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0088) OMAP4430_CM2_L4PER_INST 373 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_HECC1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0090) OMAP4430_CM2_L4PER_INST 375 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_HECC2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0098) OMAP4430_CM2_L4PER_INST 377 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00a0) OMAP4430_CM2_L4PER_INST 379 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00a8) OMAP4430_CM2_L4PER_INST 381 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00b0) OMAP4430_CM2_L4PER_INST 383 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00b8) OMAP4430_CM2_L4PER_INST 385 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_L4PER_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00c0) OMAP4430_CM2_L4PER_INST 387 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCASP2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00d0) OMAP4430_CM2_L4PER_INST 389 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCASP3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00d8) OMAP4430_CM2_L4PER_INST 391 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCBSP4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00e0) OMAP4430_CM2_L4PER_INST 393 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MGATE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00e8) OMAP4430_CM2_L4PER_INST 395 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCSPI1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00f0) OMAP4430_CM2_L4PER_INST 397 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCSPI2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00f8) OMAP4430_CM2_L4PER_INST 399 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCSPI3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0100) OMAP4430_CM2_L4PER_INST 401 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MCSPI4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0108) OMAP4430_CM2_L4PER_INST 403 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MMCSD3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0120) OMAP4430_CM2_L4PER_INST 405 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MMCSD4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0128) OMAP4430_CM2_L4PER_INST 407 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MSPROHG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0130) OMAP4430_CM2_L4PER_INST 409 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0138) OMAP4430_CM2_L4PER_INST 411 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_UART1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0140) OMAP4430_CM2_L4PER_INST 413 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_UART2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0148) OMAP4430_CM2_L4PER_INST 415 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_UART3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0150) OMAP4430_CM2_L4PER_INST 417 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_UART4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0158) OMAP4430_CM2_L4PER_INST 419 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_MMCSD5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0160) OMAP4430_CM2_L4PER_INST 421 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4PER_I2C5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0168) OMAP4430_CM2_L4PER_INST 423 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0180) OMAP4430_CM2_L4PER_INST 425 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0184) OMAP4430_CM2_L4PER_INST 427 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0188) OMAP4430_CM2_L4PER_INST 429 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_AES1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01a0) OMAP4430_CM2_L4PER_INST 431 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_AES2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01a8) OMAP4430_CM2_L4PER_INST 433 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_DES3DES_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01b0) OMAP4430_CM2_L4PER_INST 435 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01b8) OMAP4430_CM2_L4PER_INST 437 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_RNG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01c0) OMAP4430_CM2_L4PER_INST 439 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01c8) OMAP4430_CM2_L4PER_INST 441 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4SEC_CRYPTODMA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01d8)