OMAP4430_CM2_CORE_INST 166 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_CORE_INST, OMAP4430_CM2_CORE_INST 244 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_CORE_INST, OMAP4430_CM2_CORE_INST 264 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_CORE_INST, OMAP4430_CM2_CORE_INST 293 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_CORE_INST, OMAP4430_CM2_CORE_INST 312 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_CORE_INST, OMAP4430_CM2_CORE_INST 335 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_CORE_INST, OMAP4430_CM2_CORE_INST 345 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_CORE_INST, OMAP4430_CM2_CORE_INST 398 arch/arm/mach-omap2/clockdomains44xx_data.c .cm_inst = OMAP4430_CM2_CORE_INST, OMAP4430_CM2_CORE_INST 169 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_1_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0000) OMAP4430_CM2_CORE_INST 171 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_1_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0008) OMAP4430_CM2_CORE_INST 173 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_1_L3_1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0020) OMAP4430_CM2_CORE_INST 175 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0100) OMAP4430_CM2_CORE_INST 177 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0108) OMAP4430_CM2_CORE_INST 179 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_L3_2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0120) OMAP4430_CM2_CORE_INST 181 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_GPMC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0128) OMAP4430_CM2_CORE_INST 183 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3_2_OCMC_RAM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0130) OMAP4430_CM2_CORE_INST 185 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DUCATI_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0200) OMAP4430_CM2_CORE_INST 187 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DUCATI_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0204) OMAP4430_CM2_CORE_INST 189 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DUCATI_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0208) OMAP4430_CM2_CORE_INST 191 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DUCATI_DUCATI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0220) OMAP4430_CM2_CORE_INST 193 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SDMA_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0300) OMAP4430_CM2_CORE_INST 195 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SDMA_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0304) OMAP4430_CM2_CORE_INST 197 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SDMA_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0308) OMAP4430_CM2_CORE_INST 199 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SDMA_SDMA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0320) OMAP4430_CM2_CORE_INST 201 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0400) OMAP4430_CM2_CORE_INST 203 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_DMM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0420) OMAP4430_CM2_CORE_INST 205 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0428) OMAP4430_CM2_CORE_INST 207 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0430) OMAP4430_CM2_CORE_INST 209 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0438) OMAP4430_CM2_CORE_INST 211 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_DLL_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0440) OMAP4430_CM2_CORE_INST 213 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_H1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0450) OMAP4430_CM2_CORE_INST 215 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_EMIF_H2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0458) OMAP4430_CM2_CORE_INST 217 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_MEMIF_DLL_H_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0460) OMAP4430_CM2_CORE_INST 219 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0500) OMAP4430_CM2_CORE_INST 221 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0504) OMAP4430_CM2_CORE_INST 223 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508) OMAP4430_CM2_CORE_INST 225 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520) OMAP4430_CM2_CORE_INST 227 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) OMAP4430_CM2_CORE_INST 229 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530) OMAP4430_CM2_CORE_INST 231 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0600) OMAP4430_CM2_CORE_INST 233 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0608) OMAP4430_CM2_CORE_INST 235 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_L4_CFG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0620) OMAP4430_CM2_CORE_INST 237 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0628) OMAP4430_CM2_CORE_INST 239 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0630) OMAP4430_CM2_CORE_INST 241 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L4CFG_SAR_ROM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0638) OMAP4430_CM2_CORE_INST 243 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INSTR_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0700) OMAP4430_CM2_CORE_INST 245 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0720) OMAP4430_CM2_CORE_INST 247 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0728) OMAP4430_CM2_CORE_INST 249 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0740)