OMAP4430_CM2_CKGEN_INST 75 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_DUCATI_ISS_ROOT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0000) OMAP4430_CM2_CKGEN_INST 77 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_USB_60MHZ OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0004) OMAP4430_CM2_CKGEN_INST 79 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SCALE_FCLK OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0008) OMAP4430_CM2_CKGEN_INST 81 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_PERF1 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0010) OMAP4430_CM2_CKGEN_INST 83 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_PERF2 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0014) OMAP4430_CM2_CKGEN_INST 85 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_PERF3 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0018) OMAP4430_CM2_CKGEN_INST 87 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_PERF4 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x001c) OMAP4430_CM2_CKGEN_INST 89 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CORE_DVFS_CURRENT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0024) OMAP4430_CM2_CKGEN_INST 91 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVA_DVFS_PERF_TESLA OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0028) OMAP4430_CM2_CKGEN_INST 93 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVA_DVFS_PERF_IVAHD OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x002c) OMAP4430_CM2_CKGEN_INST 95 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVA_DVFS_PERF_ABE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0030) OMAP4430_CM2_CKGEN_INST 97 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IVA_DVFS_CURRENT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0038) OMAP4430_CM2_CKGEN_INST 99 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKMODE_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0040) OMAP4430_CM2_CKGEN_INST 101 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IDLEST_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0044) OMAP4430_CM2_CKGEN_INST 103 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_AUTOIDLE_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0048) OMAP4430_CM2_CKGEN_INST 105 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x004c) OMAP4430_CM2_CKGEN_INST 107 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M2_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0050) OMAP4430_CM2_CKGEN_INST 109 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M3_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0054) OMAP4430_CM2_CKGEN_INST 111 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M4_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0058) OMAP4430_CM2_CKGEN_INST 113 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M5_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x005c) OMAP4430_CM2_CKGEN_INST 115 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M6_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0060) OMAP4430_CM2_CKGEN_INST 117 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064) OMAP4430_CM2_CKGEN_INST 119 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068) OMAP4430_CM2_CKGEN_INST 121 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) OMAP4430_CM2_CKGEN_INST 123 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080) OMAP4430_CM2_CKGEN_INST 125 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IDLEST_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0084) OMAP4430_CM2_CKGEN_INST 127 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_AUTOIDLE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0088) OMAP4430_CM2_CKGEN_INST 129 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x008c) OMAP4430_CM2_CKGEN_INST 131 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090) OMAP4430_CM2_CKGEN_INST 133 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8) OMAP4430_CM2_CKGEN_INST 135 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) OMAP4430_CM2_CKGEN_INST 137 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4) OMAP4430_CM2_CKGEN_INST 139 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKMODE_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c0) OMAP4430_CM2_CKGEN_INST 141 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_IDLEST_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c4) OMAP4430_CM2_CKGEN_INST 143 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c8) OMAP4430_CM2_CKGEN_INST 145 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_CLKSEL_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00cc) OMAP4430_CM2_CKGEN_INST 147 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0) OMAP4430_CM2_CKGEN_INST 149 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8) OMAP4430_CM2_CKGEN_INST 151 arch/arm/mach-omap2/cm2_44xx.h #define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)