ATH79_CLK_DDR      39 arch/mips/ath79/clock.c 	[ATH79_CLK_DDR] = "ddr",
ATH79_CLK_DDR     120 arch/mips/ath79/clock.c 	ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ATH79_CLK_DDR     140 arch/mips/ath79/clock.c 	ath79_set_ff_clk(ATH79_CLK_DDR, "ref", mult, div * ddr_div);
ATH79_CLK_DDR     206 arch/mips/ath79/clock.c 	ath79_set_ff_clk(ATH79_CLK_DDR, "ref", ninit_mul,
ATH79_CLK_DDR     340 arch/mips/ath79/clock.c 	ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ATH79_CLK_DDR     429 arch/mips/ath79/clock.c 	ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ATH79_CLK_DDR     512 arch/mips/ath79/clock.c 	ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ATH79_CLK_DDR     614 arch/mips/ath79/clock.c 	ath79_set_clk(ATH79_CLK_DDR, ddr_rate);