OCTEON_DDR1_BASE  148 arch/mips/cavium-octeon/setup.c 		__cvmx_bootmem_phy_free(OCTEON_DDR1_BASE, OCTEON_DDR1_SIZE, 0);
OCTEON_DDR1_BASE  152 arch/mips/cavium-octeon/setup.c 		__cvmx_bootmem_phy_free(OCTEON_DDR1_BASE, mem_size, 0);