ATH25_REG_MS      213 arch/mips/ath25/ar2315.c 	refdiv = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_REF_DIV);
ATH25_REG_MS      215 arch/mips/ath25/ar2315.c 	fdiv = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_FDBACK_DIV);
ATH25_REG_MS      216 arch/mips/ath25/ar2315.c 	divby2 = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_ADD_FDBACK_DIV) + 1;
ATH25_REG_MS      223 arch/mips/ath25/ar2315.c 		clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKM_DIV);
ATH25_REG_MS      227 arch/mips/ath25/ar2315.c 		clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKC_DIV);
ATH25_REG_MS      236 arch/mips/ath25/ar2315.c 	cpu_div = ATH25_REG_MS(clock_ctl, AR2315_CPUCLK_CLK_DIV);
ATH25_REG_MS      268 arch/mips/ath25/ar2315.c 	memsize   = 1 + ATH25_REG_MS(memcfg, AR2315_MEM_CFG_DATA_WIDTH);
ATH25_REG_MS      269 arch/mips/ath25/ar2315.c 	memsize <<= 1 + ATH25_REG_MS(memcfg, AR2315_MEM_CFG_COL_WIDTH);
ATH25_REG_MS      270 arch/mips/ath25/ar2315.c 	memsize <<= 1 + ATH25_REG_MS(memcfg, AR2315_MEM_CFG_ROW_WIDTH);
ATH25_REG_MS      364 arch/mips/ath25/ar5312.c 	bank0_ac = ATH25_REG_MS(memcfg, AR5312_MEM_CFG1_AC0);
ATH25_REG_MS      365 arch/mips/ath25/ar5312.c 	bank1_ac = ATH25_REG_MS(memcfg, AR5312_MEM_CFG1_AC1);