NV_PRAMDAC_TEST_CONTROL  159 drivers/gpu/drm/nouveau/dispnv04/dac.c 	saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL);
NV_PRAMDAC_TEST_CONTROL  160 drivers/gpu/drm/nouveau/dispnv04/dac.c 	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL,
NV_PRAMDAC_TEST_CONTROL  220 drivers/gpu/drm/nouveau/dispnv04/dac.c 	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL, saved_rtest_ctrl);
NV_PRAMDAC_TEST_CONTROL  259 drivers/gpu/drm/nouveau/dispnv04/dac.c 	saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
NV_PRAMDAC_TEST_CONTROL  260 drivers/gpu/drm/nouveau/dispnv04/dac.c 	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset,
NV_PRAMDAC_TEST_CONTROL  305 drivers/gpu/drm/nouveau/dispnv04/dac.c 	temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL);
NV_PRAMDAC_TEST_CONTROL  306 drivers/gpu/drm/nouveau/dispnv04/dac.c 	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL,
NV_PRAMDAC_TEST_CONTROL  310 drivers/gpu/drm/nouveau/dispnv04/dac.c 	sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
NV_PRAMDAC_TEST_CONTROL  312 drivers/gpu/drm/nouveau/dispnv04/dac.c 	sample &= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
NV_PRAMDAC_TEST_CONTROL  314 drivers/gpu/drm/nouveau/dispnv04/dac.c 	temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL);
NV_PRAMDAC_TEST_CONTROL  315 drivers/gpu/drm/nouveau/dispnv04/dac.c 	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL,
NV_PRAMDAC_TEST_CONTROL  321 drivers/gpu/drm/nouveau/dispnv04/dac.c 	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, saved_rtest_ctrl);
NV_PRAMDAC_TEST_CONTROL  406 drivers/gpu/drm/nouveau/dispnv04/dac.c 		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);
NV_PRAMDAC_TEST_CONTROL  408 drivers/gpu/drm/nouveau/dispnv04/dac.c 		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);
NV_PRAMDAC_TEST_CONTROL  468 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);
NV_PRAMDAC_TEST_CONTROL  470 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);
NV_PRAMDAC_TEST_CONTROL   71 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
NV_PRAMDAC_TEST_CONTROL   90 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, 0);
NV_PRAMDAC_TEST_CONTROL  104 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
NV_PRAMDAC_TEST_CONTROL  110 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
NV_PRAMDAC_TEST_CONTROL  118 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, test_ctrl);
NV_PRAMDAC_TEST_CONTROL  591 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL +
NV_PRAMDAC_TEST_CONTROL  595 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL +