NV_DMA_V0_ACCESS_RDWR  176 drivers/gpu/drm/nouveau/dispnv50/disp.c 					.access = NV_DMA_V0_ACCESS_RDWR,
NV_DMA_V0_ACCESS_RDWR  187 drivers/gpu/drm/nouveau/dispnv50/disp.c 					.access = NV_DMA_V0_ACCESS_RDWR,
NV_DMA_V0_ACCESS_RDWR   69 drivers/gpu/drm/nouveau/dispnv50/wndw.c 	args.base.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  560 drivers/gpu/drm/nouveau/nouveau_abi16.c 		args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  565 drivers/gpu/drm/nouveau/nouveau_abi16.c 		args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  190 drivers/gpu/drm/nouveau/nouveau_chan.c 			args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  196 drivers/gpu/drm/nouveau/nouveau_chan.c 			args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  203 drivers/gpu/drm/nouveau/nouveau_chan.c 			args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  209 drivers/gpu/drm/nouveau/nouveau_chan.c 			args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  386 drivers/gpu/drm/nouveau/nouveau_chan.c 			args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  404 drivers/gpu/drm/nouveau/nouveau_chan.c 			args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  410 drivers/gpu/drm/nouveau/nouveau_chan.c 			args.access = NV_DMA_V0_ACCESS_RDWR;
NV_DMA_V0_ACCESS_RDWR  401 drivers/gpu/drm/nouveau/nouveau_drm.c 						.access = NV_DMA_V0_ACCESS_RDWR,
NV_DMA_V0_ACCESS_RDWR   96 drivers/gpu/drm/nouveau/nv17_fence.c 					.access = NV_DMA_V0_ACCESS_RDWR,
NV_DMA_V0_ACCESS_RDWR   57 drivers/gpu/drm/nouveau/nv50_fence.c 					.access = NV_DMA_V0_ACCESS_RDWR,
NV_DMA_V0_ACCESS_RDWR  145 drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c 	case NV_DMA_V0_ACCESS_RDWR: