NV_CIO_CRE_PIXEL_INDEX  573 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] = (fb->format->depth + 1) / 8;
NV_CIO_CRE_PIXEL_INDEX  576 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (1 << 7);
NV_CIO_CRE_PIXEL_INDEX  856 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] &= ~3;
NV_CIO_CRE_PIXEL_INDEX  857 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (drm_fb->format->depth + 1) / 8;
NV_CIO_CRE_PIXEL_INDEX  861 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_PIXEL_INDEX);
NV_CIO_CRE_PIXEL_INDEX  165 drivers/gpu/drm/nouveau/dispnv04/dac.c 	saved_pi = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX);
NV_CIO_CRE_PIXEL_INDEX  166 drivers/gpu/drm/nouveau/dispnv04/dac.c 	NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX,
NV_CIO_CRE_PIXEL_INDEX  221 drivers/gpu/drm/nouveau/dispnv04/dac.c 	NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX, saved_pi);
NV_CIO_CRE_PIXEL_INDEX  599 drivers/gpu/drm/nouveau/dispnv04/hw.c 	rd_cio_state(dev, head, regp, NV_CIO_CRE_PIXEL_INDEX);
NV_CIO_CRE_PIXEL_INDEX  713 drivers/gpu/drm/nouveau/dispnv04/hw.c 	wr_cio_state(dev, head, regp, NV_CIO_CRE_PIXEL_INDEX);